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LS120 Schematic ( PDF Datasheet ) - Micross

Teilenummer LS120
Beschreibung General Purpose
Hersteller Micross
Logo Micross Logo 




Gesamt 1 Seiten
LS120 Datasheet, Funktion
LS120
MONOLITHIC DUAL
NPN TRANSISTOR
Linear Systems replaces discontinued Intersil IT120
The LS120 is a monolithic pair of NPN transistors
mounted in a single P-DIP package. The monolithic
dual chip design reduces parasitics and gives better
performance while ensuring extremely tight matching.
The LS120 is a direct replacement for discontinued
Intersil IT120.
FEATURES 
Direct Replacement for INTERSIL IT120 
HIGH  hFE @ LOW CURRENT 
OUTPUT CAPACITANCE 
VBE tracking
ABSOLUTE MAXIMUM RATINGS 1 
≥ 200 @ 10µA 
≤ 2.0pF 
≤ 5.0µV°C 
The 8 Pin P-DIP provides ease of manufacturing, and
@ 25°C (unless otherwise noted) 
the symmetrical pinout prevents improper orientation.
Maximum Temperatures 
(See Packaging Information).
Storage Temperature 
Operating Junction Temperature 
65°C to +200°C 
55°C to +150°C 
Maximum Power Dissipation 
LS120 Features:
ƒ High hfe at low current
ƒ Tight matching
ƒ Tight VBE tracking
ƒ Low Output Capacitance
Continuous Power Dissipation (One side) 
Continuous Power Dissipation (Both sides) 
Linear Derating factor (One side) 
Linear Derating factor (Both sides) 
Maximum Currents 
250mW 
500mW 
2.3mW/°C 
4.3mW/°C 
Collector Current 
10mA 
  
MATCHING CHARACTERISTICS @ 25°C (unless otherwise stated) 
SYMBOL 
CHARACTERISTIC 
MIN  TYP  MAX  UNITS  CONDITIONS 
|VBE1  VBE2 | 
Base Emitter Voltage Differential 
‐‐  ‐‐  2  mV 
IC = 10µA, VCE = 5V 
|(VBE1  VBE2)| / ∆T  Base Emitter Voltage Differential 
  Change with Temperature 
‐‐  ‐‐ 
5  µV/°C 
IC = 10µA, VCE = 5V 
TA = ‐55°C to +125°C 
|IB1  IB2 | 
Base Current Differential 
 
ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL 
CHARACTERISTICS 
MIN. 
Click To BuyBVCBO 
Collector to Base Voltage 
45 
‐‐  ‐‐ 
5 
TYP. 
‐‐ 
MAX. 
‐‐ 
UNITS 
V 
nA  IC = 10µA, VCE = 5V 
CONDITIONS 
IC = 10µA, IE = 0 
BVCEO 
Collector to Emitter Voltage 
45  ‐‐  ‐‐  V 
BVEBO  EmitterBase Breakdown Voltage  6.2  ‐‐  ‐‐  V 
BVCCO 
Collector to Collector Voltage 
60  ‐‐  ‐‐  V 
IC = 10µA, IB = 0 
IE = 10µA, IC = 02 
IC = 10µA, IE = 0 
hFE 
DC Current Gain 
200  ‐‐ 
‐‐ 
 
IC = 10µA, VCE = 5V 
225  ‐‐ 
‐‐ 
 
IC = 1.0mA, VCE = 5V 
VCE(SAT) 
Collector Saturation Voltage 
‐‐  ‐‐  0.5  V 
IC = 0.5mA, IB = 0.05mA 
IEBO 
Emitter Cutoff Current 
‐‐  ‐‐  1  nA 
IC = 0, VEB = 3V 
ICBO 
Collector Cutoff Current 
‐‐  ‐‐  1  nA 
IE = 0, VCB = 45V 
COBO 
Output Capacitance 
‐‐  ‐‐  2  pF 
IE = 0, VCB = 5V 
CC1C2 
IC1C2 
Collector to Collector Capacitance 
Collector to Collector Leakage Current 
‐‐ 
‐‐ 
‐‐  2  pF 
‐‐  10  nA 
VCC = 0V 
VCC = ±60V 
fT 
Current Gain Bandwidth Product  220  ‐‐ 
‐‐  MHz 
IC = 1mA, VCE = 5V 
NF 
Narrow Band Noise Figure 
‐‐  ‐‐  3  dB  IC = 100µA,  VCE = 5V, BW=200Hz, RG= 10KΩ, 
f = 1KHz 
Notes: 
1. Absolute Maximum ratings are limiting values above which serviceability may be impaired
2. The reverse basetoemitter voltage must never exceed 6.2 volts; the reverse basetoemitter current must never exceed 10µA. 
 
Available Packages:
LS120 in P-DIP
LS120 available as bare die
Please contact Micross for full package and die dimensions:
Web: www.micross.com/distribution.aspx
P-DIP (Top View)
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.





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