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420AR-32 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer 420AR-32
Beschreibung AD420AR-32
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 12 Seiten
420AR-32 Datasheet, Funktion
a
Serial Input 16-Bit
4–20 mA, 0–20 mA DAC
AD420
FEATURES
4–20 mA, 0–20 mA or 0–24 mA Current Output
16-Bit Resolution and Monotonicity
؎0.012% max Integral Nonlinearity
؎0.05% max Offset (Trimmable)
؎0.15% max Total Output Error (Trimmable)
Flexible Serial Digital Interface (3.3 MBPS)
On-Chip Loop Fault Detection
On-Chip 5 V Reference (25 ppm/؇C max)
Asynchronous CLEAR Function
Maximum Power Supply Range of 32 V
Output Loop Compliance of 0 V to VCC – 2.5 V
24-Pin SOIC and PDIP Packages
PRODUCT DESCRIPTION
The AD420 is a complete digital to current loop output con-
verter, designed to meet the needs of the industrial control mar-
ket. It provides a high precision, fully integrated, low cost
single-chip solution for generating current loop signals in a com-
pact 24-pin SOIC or PDIP package.
The output current range can be programmed to 4 mA–20 mA,
0 mA–20 mA or an overrange function of 0 mA–24 mA. The
AD420 can alternatively provide a voltage output from a sepa-
rate pin that can be configured to provide 0 V–5 V, 0 V–10 V,
± 5 V or ± 10 V with the addition of a single external buffer
amplifier.
The 3.3M Baud serial input logic design minimizes the cost of
galvanic isolation and allows for simple connection to com-
monly used microprocessors. It can be used in three-wire or
asynchronous mode and a serial-out pin is provided to allow
daisy chaining of multiple DACs on the current loop side of the
isolation barrier.
The AD420 uses sigma-delta (Σ∆) DAC technology to achieve
16-bit monotonicity at very low cost. Full-scale settling to 0.1%
occurs within 3 ms. The only external components that are
required (in addition to normal transient protection circuitry)
are three low cost capacitors which are used in the DAC output
filter.
If the AD420 is going to be used at extreme temperatures and
supply voltages, an external output transistor can be used to
minimize power dissipation on the chip via the “BOOST” pin.
The FAULT DETECT pin signals when an open circuit occurs
in the loop. The on-chip voltage reference can be used to supply
a precision +5 V to external components in addition to the
AD420 or, if the user desires temperature stability exceeding
25 ppm/°C, an external precision reference such as the AD586
can be used as the reference.
FUNCTIONAL BLOCK DIAGRAM
VLL
REF OUT
REF IN
DATA OUT
CLEAR
LATCH
CLOCK
DATA IN
RANGE
SELECT 1
RANGE
SELECT 2
VCC
REFERENCE
4k
AD420
DATA I/P
REGISTER
CLOCK
16-BIT
DAC
SWITCHED
CURRENT
SOURCES
AND
FILTERING
40
BOOST
1.25k
IOUT
VOUT
FAULT
DETECT
OFFSET
TRIM
CAP 1,2,3
GND
The AD420 is available in a 24-pin SOIC and PDIP over the in-
dustrial temperature range of –40°C to +85°C.
PRODUCT HIGHLIGHTS
1. The AD420 is a single chip solution for generating 4 mA–
20 mA or 0 mA–20 mA signals at the “controller end” of the
current loop.
2. The AD420 is specified with a power supply range
from 12 V to 32 V. Output loop compliance is 0 V to
VCC – 2.5 V.
3. The flexible serial input can be used in three-wire mode
with SPI* or MICROWIRE† microcontrollers, or in asyn-
chronous mode which minimizes the number of control
signals required.
4. The serial data out pin can be used to daisy chain any num-
ber of AD420s together in three-wire mode.
5. At power-up the AD420 initializes its output to the low end
of the selected range.
6. The AD420 has an asynchronous CLEAR pin which sends
the output to the low end of the selected range (0 mA,
4 mA, or 0 V).
7. The AD420 BOOST pin accommodates an external transis-
tor to off-load power dissipation from the chip.
8. The offset of ± 0.05% and total output error of ± 0.15% can
be trimmed if desired, using two external potentiometers.
*SPI is a registered trademark of Motorola.
†MlCROWIRE is a registered trademark of National Semiconductor.
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1995
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703






420AR-32 Datasheet, Funktion
AD420
THEORY OF OPERATION
The AD420 uses a sigma-delta (Σ∆) architecture to carry out
the digital-to-analog conversion. This architecture is particularly
well suited for the relatively low bandwidth requirements of the
industrial control environment because of its inherent monoto-
nicity at high resolution.
In the AD420 a second order modulator is used to keep com-
plexity and die size to a minimum. The single bit stream from
the modulator controls a switched current source that is then
filtered by three, continuous time resistor-capacitor sections.
The capacitors are the only external components that have to be
added for standard current-out operation. The filtered current is
amplified and mirrored to the supply rail so that the application
simply sees a 4 mA–20 mA, 0 mA–20 mA, or 0 mA–24 mA
current source output with respect to ground. The AD420 is
manufactured on a BiCMOS process that is well suited to
implementing low voltage digital logic with high performance
and high voltage analog circuitry.
The AD420 can also provide a voltage output instead of a cur-
rent loop output if desired. The addition of a single external
amplifier allows the user to obtain 0 V–5 V, 0 V–10 V, ±5 V, or
± 10 V.
The AD420 has a loop fault detection circuit that warns if the
voltage at IOUT attempts to rise above the compliance range, due
to an open-loop circuit or insufficient power supply voltage. The
FAULT DETECT is an active low open drain signal so that one
can connect several AD420s together to one pull-up resistor for
global error detection. The pull-up resistor can be tied to the
VLL pin, or an external +5 V logic supply.
The IOUT current is controlled by a PMOS transistor and inter-
nal amplifier as shown in the functional block diagram. The in-
ternal circuitry that develops the fault output avoids using a
comparator with “window limits” since this would require an
actual output error before the FAULT DETECT output be-
comes active. Instead, the signal is generated when the internal
amplifier in the output stage of the AD420 has less than ap-
proximately one volt remaining of drive capability (when the
gate of the output PMOS transistor nearly reaches ground).
Thus the FAULT DETECT output activates slightly before the
compliance limit is reached. Since the comparison is made
within the feedback loop of the output amplifier, the output ac-
curacy is maintained by its open-loop gain, and no output error
occurs before the fault detect output becomes active.
The three-wire digital interface, comprising DATA IN,
CLOCK, and LATCH, interfaces to all commonly used serial
microprocessors without the addition of any external glue logic.
Data is loaded into an input register under control of CLOCK
and is loaded to the DAC when LATCH is strobed. If a user
wants to minimize the number of galvanic isolators in an intrin-
sically safe application, the AD420 can be configured to run in
“asynchronous” mode. This mode is selected by connecting the
LATCH pin to Vcc through a current limiting resistor. The data
must then be combined with a start and stop bit to “frame” the
information and trigger the internal LATCH signal.
VLL 2
REF OUT 14
VCC
23
REFERENCE
4k
AD420
REF IN 15
DATA OUT 10
CLEAR 6
LATCH 7
CLOCK 8
DATA IN 9
RANGE
SELECT 1
RANGE
SELECT 2
5
4
DATA I/P
REGISTER
CLOCK
16-BIT
DAC
16
OFFSET
TRIM
SWITCHED
CURRENT
SOURCES
AND
FILTERING
20 21 22
CAP 1,2,3
40
19 BOOST
18 IOUT
17 VOUT
1.25k
3
FAULT
DETECT
11
GND
Figure 4. Functional Block Diagram
–6– REV. C

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