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K40P121M100SF2 Schematic ( PDF Datasheet ) - Freescale Semiconductor

Teilenummer K40P121M100SF2
Beschreibung K40 Sub-Family
Hersteller Freescale Semiconductor
Logo Freescale Semiconductor Logo 




Gesamt 30 Seiten
K40P121M100SF2 Datasheet, Funktion
Freescale Semiconductor
Data Sheet: Product Preview
K40 Sub-Family Data Sheet
Supports the following:
MK40N512VMC100
Features
Operating Characteristics
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
Performance
– Up to 100 MHz ARM Cortex-M4 core with DSP
instructions delivering 1.25 Dhrystone MIPS per
MHz
Memories and memory interfaces
– Up to 512 KB program flash memory on non-
FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
Clocks
– 3 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
System peripherals
– 10 low-power modes to provide power optimization
based on application requirements
– Memory protection unit with multi-master
protection
– 16-channel DMA controller, supporting up to 64
request sources
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
Security and integrity modules
– Hardware CRC module to support fast cyclic
redundancy checks
– 128-bit unique identification (ID) number per chip
www.DataSheet4U.com
Document Number: K40P121M100SF2
Rev. 4, 3/2011
K40P121M100SF2
Human-machine interface
– Segment LCD controller supporting up to 40
frontplanes and 8 backplanes, or 44 frontplanes and
4 backplanes
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
Analog modules
– Two 16-bit SAR ADCs
– Programmable gain amplifier (up to x64) integrated
into each ADC
– Two 12-bit DACs
– Three analog comparators (CMP) containing a 6-bit
DAC and programmable reference input
– Voltage reference
Timers
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
timer
– Two 2-channel quadrature decoder/general purpose
timers
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
Communication interfaces
– USB full-/low-speed On-the-Go controller with on-
chip transceiver
– Two Controller Area Network (CAN) modules
– Three SPI modules
– Two I2C modules
– Five UART modules
– Secure Digital host controller (SDHC)
– I2S module
This document contains information on a product under development. Freescale
reserves the right to change or discontinue this product without notice.
© 2010–2011 Freescale Semiconductor, Inc.
Preliminary






K40P121M100SF2 Datasheet, Funktion
Terminology and guidelines
3.4 Definition: Rating
A rating is a minimum or maximum value of a technical characteristic that, if exceeded,
may cause permanent chip failure:
Operating ratings apply during operation of the chip.
Handling ratings apply when the chip is not powered.
3.4.1 Example
This is an example of an operating rating:
Symbol
VDD
Description
1.0 V core supply
voltage
Min.
–0.3
Max.
1.2
Unit
V
3.5 Result of exceeding a rating
40
30
20 The likelihood of permanent chip failure increases rapidly as
soon as a characteristic begins to exceed one of its operating ratings.
10
0
Measured characteristic
Operating rating
www.DataSheet4U.com
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
6
Preliminary
Freescale Semiconductor, Inc.

6 Page









K40P121M100SF2 pdf, datenblatt
General
1. Rising thresholds are falling threshold + hysteresis voltage
Table 3. VBAT power operating requirements
Symbol Description
VPOR_VBAT Falling VBAT supply POR detect voltage
Min.
TBD
Typ.
1.1
Max.
TBD
Unit Notes
V
5.1.3 Voltage and current operating behaviors
Table 4. Voltage and current operating behaviors
Symbol
VOH
Description
Output high voltage — high drive strength
• 2.7 V ≤ VDD ≤ 3.6 V, IOH = -10mA
• 1.71 V ≤ VDD ≤ 2.7 V, IOH = -3mA
Min.
VDD – 0.5
VDD – 0.5
Max.
Output high voltage — low drive strength
• 2.7 V ≤ VDD ≤ 3.6 V, IOH = -2mA
• 1.71 V ≤ VDD ≤ 2.7 V, IOH = -0.6mA
VDD – 0.5
VDD – 0.5
IOHT Output high current total for all ports
VOL Output low voltage — high drive strength
• 2.7 V ≤ VDD ≤ 3.6 V, IOL = 10mA
• 1.71 V ≤ VDD ≤ 2.7 V, IOL = 3mA
— 100
— 0.5
— 0.5
Output low voltage — low drive strength
• 2.7 V ≤ VDD ≤ 3.6 V, IOL = 2mA
• 1.71 V ≤ VDD ≤ 2.7 V, IOL = 0.6mA
— 0.5
— 0.5
IOLT Output low current total for all ports
IIN Input leakage current (per pin)
IOZ Hi-Z (off-state) leakage current (per pin)
RPU Internal pullup resistors
RPD Internal pulldown resistors
— 100
—1
—1
30 50
30 50
1. Measured at VDD=3.6V
2. Measured at VDD supply voltage = VDD min and Vinput = VSS
3. Measured at VDD supply voltage = VDD min and Vinput = VDD
www.DataSheet4U.com
Unit
V
V
V
V
mA
V
V
V
V
mA
μA
μA
Notes
1
2
3
5.1.4 Power mode transition operating behaviors
All specifications except tPOR, and VLLSxRUN recovery times in the following table
assume this clock configuration:
K40 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
12
Preliminary
Freescale Semiconductor, Inc.

12 Page





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