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K10P104M100SF2 Schematic ( PDF Datasheet ) - Freescale Semiconductor

Teilenummer K10P104M100SF2
Beschreibung K10 Sub-Family
Hersteller Freescale Semiconductor
Logo Freescale Semiconductor Logo 




Gesamt 60 Seiten
K10P104M100SF2 Datasheet, Funktion
Freescale Semiconductor
Data Sheet: Product Preview
Document Number: K10P104M100SF2
Rev. 1, 11/2010
K10 Sub-Family Data Sheet
Supports the following:
MK10N512VLL100, MK10N512VML100
Features
Operating Characteristics
– Voltage range: 1.71 to 3.6 V
– Flash write voltage range: 1.71 to 3.6 V
– Temperature range (ambient): -40 to 105°C
Performance
– Up to 100 MHz ARM Cortex-M4 core with DSP
instructions delivering 1.25 Dhrystone MIPS per
MHz
Memories and memory interfaces
– Up to 512 KB program flash memory on non-
FlexMemory devices
– Up to 128 KB RAM
– Serial programming interface (EzPort)
– FlexBus external bus interface
Clocks
– 1 to 32 MHz crystal oscillator
– 32 kHz crystal oscillator
– Multi-purpose clock generator
System peripherals
– 10 low-power modes to provide power optimization
based on application requirements
– Memory protection unit with multi-master
protection
– 16-channel DMA controller, supporting up to 64
request sources
– External watchdog monitor
– Software watchdog
– Low-leakage wakeup unit
Security and integrity modules
– Hardware CRC module to support fast cyclic
redundancy checks
– Hardware random-number generator
– 128-bit unique identification (ID) number per chip
www.DataSheet4U.com
K10P104M100SF2
Human-machine interface
– Low-power hardware touch sensor interface (TSI)
– General-purpose input/output
Analog modules
– 16-bit SAR ADC with PGA (x64)
– 12-bit DAC
– Analog comparator (CMP) containing a 6-bit DAC
and programmable reference input
– Voltage reference
Timers
– Programmable delay block
– Eight-channel motor control/general purpose/PWM
timers
– Two-channel quadrature decoder/general purpose
timers
– Periodic interrupt timers
– 16-bit low-power timer
– Carrier modulator transmitter
– Real-time clock
Communication interfaces
– Controller Area Network (CAN) module
– SPI modules
– I2C modules
– UART modules
– Secure Digital host controller (SDHC)
– I2S
This document contains information on a product under development. Freescale
reserves the right to change or discontinue this product without notice.
© 2010–2010 Freescale Semiconductor, Inc.
Preliminary






K10P104M100SF2 Datasheet, Funktion
Terminology and guidelines
3.1.1 Example
This is an example of an operating requirement, which you must meet for the
accompanying operating behaviors to be guaranteed:
Symbol
VDD
Description
1.0 V core supply volt‐
age
0.9
Min.
Max.
1.1
Unit
V
3.2 Definition: Operating behavior
An operating behavior is a specified value or range of values for a technical
characteristic that are guaranteed during operation if you meet the operating requirements
and any other specified conditions.
3.2.1 Example
This is an example of an operating behavior, which is guaranteed if you meet the
accompanying operating requirements:
Symbol
IWP
Description
Digital I/O weak pullup/ 10
pulldown current
Min.
Max.
130
Unit
µA
3.3 Definition: Attribute
An attribute is a specified value or range of values for a technical characteristic that are
guaranteed, regardless of whether you meet the operating requirements.
3.3.1 Example
This is an example of an attribute:
www.DataSheet4U.com
Symbol
Description
CIN_D
Input capacitance: digi‐ —
tal pins
Min.
Max.
7
Unit
pF
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
6
Preliminary
Freescale Semiconductor, Inc.

6 Page









K10P104M100SF2 pdf, datenblatt
General
Symbol
IIC
Table 1. Voltage and current operating requirements (continued)
Description
DC injection current — single pin
• VIN > VDD
• VIN < VSS
Min.
0
0
Max.
2
–0.2
Unit
mA
mA
DC injection current — total MCU limit, includes sum
of all stressed pins
• VIN > VDD
• VIN < VSS
0
0
25 mA
–5 mA
Notes
1
1
1. All functional non-supply pins are internally clamped to VSS and VDD. Input must be current limited to the value specified.
To determine the value of the required current-limiting resistor, calculate resistance values for positive and negative clamp
voltages, then use the larger of the two values. Power supply must maintain regulation within operating VDD range during
instantaneous and operating maximum current conditions. If positive injection current (VIn > VDD) is greater than IDD, the
injection current may flow out of VDD and could result in external power supply going out of regulation. Ensure external
VDD load will shunt current greater than maximum injection current. This will be the greatest risk when the MCU is not
consuming power. Examples are: if no system clock is present, or if clock rate is very low (which would reduce overall
power consumption).
5.1.2 LVD and POR operating requirements
Table 2. LVD and POR operating requirements
Symbol Description
VPOR Falling VDD POR detect voltage
VLVDH
Falling low-voltage detect threshold — high
range (LVDV=01)
Low-voltage warning thresholds — high range
VLVW1
VLVW2
VLVW3
VLVW4
• Level 1 falling (LVWV=00)
• Level 2 falling (LVWV=01)
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
VHYS
Low-voltage inhibit reset/recover hysteresis —
high range
VLVDL
Falling low-voltage detect threshold — low range
(LVDV=00)
Low-voltage warning thresholds — low range
VLVW1
• Level 1 falling (LVWV=00)
www.DatVaSLVhWee2t4U.com• Level 2 falling (LVWV=01)
VLVW3
VLVW4
• Level 3 falling (LVWV=10)
• Level 4 falling (LVWV=11)
Min.
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Typ.
1.1
2.56
2.70
2.80
2.90
3.00
60
TBD
1.80
1.90
2.00
2.10
Max.
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Table continues on the next page...
Unit Notes
V
V
1
V
V
V
V
mV
V
1
V
V
V
V
K10 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
12
Preliminary
Freescale Semiconductor, Inc.

12 Page





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