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CY14B104M Schematic ( PDF Datasheet ) - Cypress Semiconductor

Teilenummer CY14B104M
Beschreibung 4-Mbit (512 K X 8/256 K X 16) nvSRAM
Hersteller Cypress Semiconductor
Logo Cypress Semiconductor Logo 




Gesamt 30 Seiten
CY14B104M Datasheet, Funktion
CY14B104K, CY14B104M
4-Mbit (512 K × 8/256 K × 16) nvSRAM
with Real Time Clock
Features
25 ns and 45 ns access times
Internally organized as 512 K × 8 (CY14B104K) or 256 K × 16
(CY14B104M)
Hands off automatic STORE on power-down with only a small
capacitor
STORE to QuantumTrap nonvolatile elements is initiated by
software, device pin, or AutoStore on power-down
RECALL to SRAM is initiated by software or power-up
High reliability
Infinite read, write, and RECALL cycles
1 million STORE cycles to QuantumTrap
20 year data retention
Single 3-V +20%, –10% operation
Data integrity of Cypress nvSRAM combined with full-featured
real time clock (RTC)
Watchdog timer
Clock alarm with programmable interrupts
Capacitor or battery backup for RTC
Industrial temperature
44-pin and 54-pin thin small outline package (TSOP II)
Pb-free and restriction of hazardous substances (RoHS)
compliant
Functional Description
The Cypress CY14B104K and CY14B104M combines a 4-Mbit
nonvolatile static RAM (nvSRAM) with a full-featured RTC in a
monolithic integrated circuit. The embedded nonvolatile
elements incorporate QuantumTrap technology producing the
world’s most reliable nonvolatile memory. The SRAM is read and
written infinite number of times, while independent nonvolatile
data resides in the nonvolatile elements.
The RTC function provides an accurate clock with leap year
tracking and a programmable, high accuracy oscillator. The
alarm function is programmable for periodic minutes, hours,
days, or months alarms. There is also a programmable watchdog
timer for process control.
Logic Block Diagram[1, 2, 3]
www.DataSheet4U.com
A0
A1
A2
A3
A4
A5
A6
A7
A8
A17
A18
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
Quatrum
Trap
VCC
VCA
P
2048 X 2048
R
O
STORE
POWER
CONTROL
VRTCbat
VRTCcap
W RECALL
D
E STATIC RAM
C ARRAY
O 2048 X 2048
D
E
R
STORE/RECALL
CONTROL
SOFTWARE
DETECT
HSB
A14 - A2
I
N
P
U
T
B COLUMN I/O
U
F
F
E
R COLUMN DEC
S
A9 A10 A11 A12 A13 A14 A15 A16
RTC
MUX
Xout
Xin
INT
A18- A0
OE
WE
CE
BLE
Notes
1. Address A0 - A18 for ×8 configuration and Address A0 - A17 for ×16 configuration.
2. Data DQ0 - DQ7 for ×8 configuration and Data DQ0 - DQ15 for ×16 configuration.
3. BHE and BLE are applicable for ×16 configuration only.
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-07103 Rev. *S
BHE
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 21, 2011
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CY14B104M Datasheet, Funktion
CY14B104K, CY14B104M
Table 2. Mode Selection
CE WE
HX
LH
LL
LH
OE BHE, BLE[6]
XX
LL
XL
LX
L H LX
L H LX
L H LX
Preventing AutoStore
The AutoStore function is disabled by initiating an AutoStore
disable sequence. A sequence of read operations is performed
in a manner similar to the Software STORE initiation. To initiate
the AutoStore disable sequence, the following sequence of CE
or OE controlled read operations must be performed:
1. Read address 0x4E38 Valid READ
2. Read address 0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x8B45 AutoStore Disable
The AutoStore is re-enabled by initiating an AutoStore enable
wwwse.DquaetanSchee.eAt4Use.cqoumence of read operations is performed in a
manner similar to the software RECALL initiation. To initiate the
A15 - A0[7]
X
X
X
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x8B45
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4B46
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x8FC0
0x4E38
0xB1C7
0x83E0
0x7C1F
0x703F
0x4C63
Mode
Not selected
Read SRAM
Write SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore
Disable
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
AutoStore
Enable
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
STORE
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile
RECALL
I/O
Output High Z
Output data
Input data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output data
Output High Z
Output data
Output data
Output data
Output data
Output data
Output High Z
Power
Standby
Active
Active
Active[8]
Active[8]
Active ICC2[8]
Active[8]
AutoStore enable sequence, the following sequence of CE or OE
controlled read operations must be performed:
1. Read address 0x4E38 Valid READ
2. Read address 0xB1C7 Valid READ
3. Read address 0x83E0 Valid READ
4. Read address 0x7C1F Valid READ
5. Read address 0x703F Valid READ
6. Read address 0x4B46 AutoStore Enable
If the AutoStore function is disabled or re-enabled, a manual
STORE operation (hardware or software) must be issued to save
the AutoStore state through subsequent power-down cycles.
The part comes from the factory with AutoStore enabled.
Notes
6. BHE and BLE are applicable for x16 configuration only.
7.
While there are 19 address lines
The remaining address lines are
on the CY14B104K
don’t care.
(18
address
lines
on
the
CY14B104M),
only
13
address
lines
(A14
-
A2)
are
used
to
control
software
modes.
8. The six consecutive address locations must be in the order listed. WE must be HIGH during all six cycles to enable a nonvolatile cycle.
Document #: 001-07103 Rev. *S
Page 6 of 33
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CY14B104M pdf, datenblatt
CY14B104K, CY14B104M
Table 5. Register Map Detail
Register
CY14B104K CY14B104M
0x7FFFF
0x3FFFF
0x7FFFE
0x3FFFE
0x7FFFD
0x3FFFD
0x7FFFC
0x3FFFC
0x7FFFB
0x3FFFB
0x7FFFA
0x3FFFA
0x7FFF9
0x3FFF9
www.DataSheet4U.com
Description
Time Keeping - Years
D7 D6 D5 D4 D3 D2 D1 D0
10s years
Years
Contains the lower two BCD digits of the year. Lower nibble (four bits) contains the value for years;
upper nibble (four bits) contains the value for 10s of years. Each nibble operates from 0 to 9. The
range for the register is 0–99.
Time Keeping - Months
D7 D6 D5 D4 D3 D2 D1 D0
00
0 10s month
Months
Contains the BCD digits of the month. Lower nibble (four bits) contains the lower digit and operates
from 0 to 9; upper nibble (one bit) contains the upper digit and operates from 0 to 1. The range
for the register is 1–12.
Time Keeping - Date
D7 D6 D5 D4 D3 D2 D1 D0
0 0 10s day of month
Day of month
Contains the BCD digits for the date of the month. Lower nibble (four bits) contains the lower digit
and operates from 0 to 9; upper nibble (two bits) contains the 10s digit and operates from 0 to 3.
The range for the register is 1–31. Leap years are automatically adjusted for.
Time Keeping - Day
D7 D6 D5 D4 D3 D2 D1 D0
00
0
00
Day of week
Lower nibble (three bits) contains a value that correlates to day of the week. Day of the week is a
ring counter that counts from 1 to 7 then returns to 1. The user must assign meaning to the day
value, because the day is not integrated with the date.
Time Keeping - Hours
D7 D6 D5 D4 D3 D2 D1 D0
00
10s hours
Hours
Contains the BCD value of hours in 24 hour format. Lower nibble (four bits) contains the lower
digit and operates from 0 to 9; upper nibble (two bits) contains the upper digit and operates from
0 to 2. The range for the register is 0–23.
Time Keeping - Minutes
D7 D6 D5 D4 D3 D2 D1 D0
0 10s minutes
Minutes
Contains the BCD value of minutes. Lower nibble (four bits) contains the lower digit and operates
from 0 to 9; upper nibble (three bits) contains the upper minutes digit and operates from 0 to 5.
The range for the register is 0–59.
Time Keeping - Seconds
D7 D6 D5 D4 D3 D2 D1 D0
0 10s seconds
Seconds
Contains the BCD value of seconds. Lower nibble (four bits) contains the lower digit and operates
from 0 to 9; upper nibble (three bits) contains the upper digit and operates from 0 to 5. The range
for the register is 0–59.
Document #: 001-07103 Rev. *S
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