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Teilenummer | P5504EDG |
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Beschreibung | P-Channel Logic Level Enhancement | |
Hersteller | Niko-Sem | |
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Gesamt 4 Seiten NIKO-SEM
P-Channel Enhancement Mode
P5504EDG
Field Effect Transistor
TO-252
Halogen-Free & Lead-Free
PRODUCT SUMMARY
V(BR)DSS
RDS(ON)
-40V
55mΩ
ID
-21A
D
G
S
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)
PARAMETERS/TEST CONDITIONS
SYMBOL
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
Pulsed Drain Current1
TC = 25 °C
TC = 100 °C
Power Dissipation
TC = 25 °C
TC = 100 °C
Operating Junction & Storage Temperature Range
VDS
VGS
ID
IDM
PD
Tj, Tstg
1. GATE
2. DRAIN
3. SOURCE
LIMITS
-40
±20
-21
-13
-39
41
16
-55 to 150
UNITS
V
V
A
W
°C
THERMAL RESISTANCE RATINGS
THERMAL RESISTANCE
SYMBOL
Junction-to-Case
RθJC
Junction-to-Ambient
RθJA
1Pulse width limited by maximum junction temperature.
TYPICAL
MAXIMUM
3
75
UNITS
°C / W
°C / W
ELECTRICAL CHARACTERISTICS (TJ = 25 °C, Unless Otherwise Noted)
PARAMETER
SYMBOL
TEST CONDITIONS
STATIC
LIMITS
UNIT
MIN TYP MAX
Drain-Source Breakdown Voltage
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current1
V(BR)DSS
VGS(th)
IGSS
IDSS
ID(ON)
VGS = 0V, ID = -250µA
VDS = VGS, ID = -250µA
VDS = 0V, VGS = ±20V
VDS = -32V, VGS = 0V
VDS = -30V, VGS = 0V, TJ = 125 °C
-40
-1.5
VDS = -5V, VGS = -10V
-96
-2
V
-3
±250 nA
1
µA
10
A
REV1.0
www.DataSheet.in
Oct-12-2010
1
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Seiten | Gesamt 4 Seiten | |
PDF Download | [ P5504EDG Schematic.PDF ] |
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