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PDF LM5041A Data sheet ( Hoja de datos )

Número de pieza LM5041A
Descripción Cascaded PWM Controller
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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May 2005
LM5041A
Cascaded PWM Controller
General Description
The LM5041A PWM controller contains all of the features
necessary to implement either current-fed or voltage-fed
push-pull or bridge power converters. These “Cascaded”
topologies are well suited for multiple output and higher
power applications. The LM5041A’s four control outputs in-
clude: the buck stage controls (HD and LD) and the push-
pull control outputs (PUSH and PULL). Push-pull outputs are
driven at 50% nominal duty cycle at one half of the switching
frequency of the buck stage and can be configured for either
a guaranteed overlap time (for current-fed applications) or a
guaranteed both-off time (for voltage-fed applications).
Push-pull stage MOSFETs can be driven directly from the
internal gate drivers while the buck stage requires an exter-
nal driver such as the LM5102. The LM5041A includes a
high-voltage start-up regulator that operates over a wide
input range of 15V to 100V. The PWM controller is designed
for high-speed capability including an oscillator frequency
range up to 1 MHz and total propagation delays of less than
100ns. Additional features include: line Under-Voltage Lock-
out (UVLO), soft-start, an error amplifier, precision voltage
reference, and thermal shutdown.
The two differences between the LM5041 and the LM5041A
are: No second level current limit in the ’A’ version No
softstart (SS) shutdown comparator in the ’A’ version .
Features
n Internal Start-up Bias Regulator
n Programmable Line Under-Voltage Lockout (UVLO) with
Adjustable Hysteresis
n Current Mode Control
n Internal Error Amplifier with Reference
n Cycle-by-cycle Over-Current Protection
n Leading Edge Blanking
n Programmable Push-Pull Overlap or Dead Time
n Internal 1.5A Push-Pull Gate Drivers
n Programmable Soft-start
n Programmable Oscillator with Sync Capability
n Precision Reference
n Thermal Shutdown
Applications
n Telecommunication Power Converters
n Industrial Power Converters
n Multi-Output Power Converters
n +42V Automotive Systems
Packages
n TSSOP-16
n LLP-16 (5x5 mm) Thermally Enhanced
Typical Application Circuit
Simplified Cascaded Push-Pull Power Converter
© 2005 National Semiconductor Corporation DS201378
www.DataSheet.in
20137801
www.national.com

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LM5041A pdf
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN to GND
VCC to GND
All Other Inputs to GND
Junction Temperature
Storage Temperature
Range
100V
16V
-0.3 to 7V
150˚C
-65˚C to +150˚C
ESD Rating
2 kV
Lead temperature (Note 2)
Wave
4 seconds
Infrared
10 seconds
Vapor Phase
75 seconds
260˚C
240˚C
219˚C
Operating Ratings (Note 1)
VIN
Junction Temperature
15 to 90V
-40˚C to +125˚C
Electrical Characteristics
Specifications with standard typeface are for TJ = 25˚C, and those with boldface type apply over full Operating Junction
Temperature range. VIN = 48V, VCC = 10V, RT = 26.7k, RSET = 20k) unless otherwise stated (Note 3)
Symbol
Parameter
Conditions Min Typ
Max
Units
Startup Regulator
VCC Reg
I-VIN
VCC Regulation
VCC Current Limit
Startup Regulator
Leakage (external Vcc
open circuit
(Note 4)
VIN = 100V
8.7 9
15 25
145
9.3 V
mA
500 µA
Supply)
Shutdown Current (Iin)
VCC Supply
VCC Under-voltage
Lockout Voltage
UVLO = 0V, VCC = open
VCC Reg
- 400mV
350
VCC Reg -
275mV
450
µA
V
(positive going Vcc)
VCC Under-voltage
Hysteresis
1.7 2.1
2.6 V
Supply Current (ICC)
Error Amplifier
CL = 0
3 4 mA
GBW
Gain Bandwidth
3 MHz
DC Gain
80 dB
Input Voltage
COMP Sink Capability
Reference Supply
VFB = COMP
VFB = 1.5V, COMP= 1V
0.735
4
0.75
8
0.765
V
mA
VREF
Ref Voltage
Ref Voltage
Regulation
IREF = 0 mA
IREF = 0 to 10mA
4.85
5
25
5.15
50
V
mV
Ref Current Limit
15 20
mA
Current Limit
ILIM Delay to Output CS Step from 0 to 0.6V
40
ns
Time to Onset of OUT
Transition (90%)
Cycle by Cycle
CL = 0
0.45
0.5
0.55
V
Threshold Voltage
Leading Edge
50 ns
Blanking Time
CS Sink Current
CS = 0.3V
25
mA
(clocked)
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LM5041A arduino
Push-Pull Outputs (Continued)
PWM Comparator
The PWM comparator compares the slope compensated
current ramp signal to the loop error voltage from the internal
error amplifier (COMP pin). This comparator is optimized for
speed in order to achieve minimum controllable duty cycles.
The comparator polarity is such that 0V on the COMP pin will
produce zero duty cycle in the buck stage.
Error Amplifier
An internal high gain wide-bandwidth error amplifier is pro-
vided within the LM5041A. The amplifier’s non-inverting in-
put is tied to a 0.75V reference. The inverting input is con-
nected to the FB pin. In non-isolated applications the power
converter output is connected to the FB pin via the voltage
setting resistors. Loop compensation components are con-
nected between the COMP and FB pins. For most isolated
applications the error amplifier function is implemented on
the secondary side of the converter and the internal error
amp is not used. The internal error amplifier is configured as
an open drain output and can be disabled by connecting the
FB pin to ground. An internal 5kpull-up resistor between
the 5V reference and COMP can be used as the pull-up for
an opto-coupler in isolated applications.
Current Limit/Current Sense
The LM5041A provides cycle-by-cycle over-current protec-
tion. If the voltage at the CS comparator (CS pin voltage plus
slope comp voltage) exceeds 0.5V the present buck stage
duty cycle is terminated (cycle by cycle current limit). A small
RC filter located near the controller is recommended to filter
current sense signals at the CS pin. An internal MOSFET
discharges the external CS pin for an additional 50ns at the
beginning of each cycle to reduce the leading edge spike
that occurs when the buck stage MOSFET is turned on.
The LM5041A current sense and PWM comparators are
very fast, and may respond to short duration noise pulses.
Layout considerations are critical for the current sense filter
and sense resistor. The capacitor associated with the CS
20137804
filter must be placed close to the device and connected
directly to the pins of the controller (CS and GND). If a
current sense transformer is used, both leads of the trans-
former secondary should be routed to the sense resistor,
which should also be located close to the IC. A resistor may
be used for current sensing instead of a transformer, located
in the push-pull transistor sources, but a low inductance type
of resistor is required. When designing with a sense resistor,
all of the noise sensitive low power grounds should be
connected together around the IC and a single connection
should be made to the high current power ground (sense
resistor ground point).
Oscillator and Sync Capability
The LM5041A oscillator is set by a single external resistor
connected between the RT pin and GND. To set a desired
oscillator frequency (F), the necessary RT resistor can be
calculated from:
The buck stage will switch at the oscillator frequency and
each push-pull output will switch at half the oscillator fre-
quency in a push-pull configuration. The LM5041A can also
be synchronized to an external clock. The external clock
must have a higher frequency than the free running fre-
quency set by the RT resistor. The clock signal should be
capacitively coupled into the RT pin with a 100pF capacitor.
A peak voltage level greater than 3V is required for detection
of the sync pulse. The sync pulse width should be set in the
15 to 150ns range by the external components. The RT
resistor is always required, whether the oscillator is free
running or externally synchronized. The voltage at the RT pin
is internally regulated to 2V. The RT resistor should be
located very close to the device and connected directly to the
pins of the IC (RT and GND).
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