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PDF LP8340ILDX-3.3 Data sheet ( Hoja de datos )
| Número de pieza | LP8340ILDX-3.3 | |
| Descripción | Low Dropout/ Low IQ/ 1.0A CMOS Linear Regulator | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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October 2003
LP8340
Low Dropout, Low IQ, 1.0A CMOS Linear Regulator
General Description
Features
The LP8340 low-dropout CMOS linear regulator is available
in 5V, 3.3V, 2.5V, 1.8V and adjustable output versions. Pack-
aged in the 6ld LLP package and 3ld DPAK. The LP8340 can
deliver up to 1.0A output current.
Typical dropout voltage is 420mV at 1.0A for the 5.0V ver-
sion, 540mV at 1.0A for the 3.3V version, 670mV at 1.0A for
the 2.5V version and 680mV at 800mA for the 1.8V version.
The LP8340 includes a zener trimmed bandgap voltage
reference, foldback current limiting and thermal overload
limiting.
The LP8340 features a PMOS output transistor which unlike
PNP type low dropout regulators requires no base drive
current. This allows the device ground current to remain less
than 50µA over operating temperature, supply voltage and
irrespective of the load current.
n ±1.5% Typical VOUT tolerance
n 420mV Typical Dropout @ 1.0A (VO = 5V)
n Wide Operating Range
2.7V to 10V
n Internal 1.0A PMOS Output Transistor
n 19µA Typical Quiescent Current
n Thermal Overload Limiting
n Foldback Current Limiting
n Zener Trimmed Bandgap Reference
n Space saving LLP package
n Temperature Range
— LP8340C
0˚C to 125˚C
— LP8340I
−40˚C to 125˚C
Applications
n Hard Disk Drives
n Notebook Computers
n Battery Powered Electronics
n Portable Instrumentation
Typical Applications
Fixed VOUT
Adjustable VOUT
20060901
© 2003 National Semiconductor Corporation DS200609
20060902
www.national.com
1 page  
LP8340C Electrical Characteristics (Continued)
Unless otherwise specified all limits guaranteed for VIN = VO+ 1V, CIN = COUT = 10µF, TJ = 25˚C. Boldface limits apply over
the full operating temperature range of TJ = 0˚C to 125˚C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5) (Note 4) (Note 5)
VIN − VO Dropout Voltage
(Note 7) (Note 8)
LP8340-1.8
IOUT = 800mA
LP8340-2.5
680 1400
IOUT = 800mA
LP8340-2.5
550 1000
IOUT = 1.0A
LP8340-3.3
LP8340-ADJ, VOUT = 3.3V, IOUT = 800mA
LP8340-3.3
670 1300
mV
420 800
LP8340-ADJ, IOUT = 1.0A
LP8340-5.0
540 1000
IOUT = 800mA
LP8340-5.0
330 650
IQ
ILIMIT
TSD
Quiescent Current
Minimum Load Current
Foldback Current Limit
Ripple Rejection Ratio
Thermal Shutdown
Temp.
IOUT = 1.0A
VIN ≤10V
VIN − VOUT ≤4V
VIN − VOUT >5V
VIN − VOUT <4V
VIN (dc) = VOUT + 2V
VIN (ac) = 1 VP-P @ 120Hz
420 800
19 50 µA
100 µA
450
1600
mA
48 55
dB
160 ˚C
Thermal Shutdown Hyst.
10
ADJ Input Leakage
Current
VADJ = 1.5V or 0V
±0.01 ±100
nA
VOUT Leakage Current LP8340-ADJ
ADJ = OUT, VOUT = 2V, VIN = 10V
LP8340-1.8, VOUT = 2.5V, VIN = 10V
LP8340-2.5, VOUT = 3.5V, VIN = 10V
LP8340-3.3, VOUT = 4V, VIN = 10V
LP8340-5.0, VOUT = 6V, VIN = 10V
en Output Noise
10Hz to 10kHz, RL = 1kΩ, COUT = 10µF
10
10
µA
10
10
10
250 µVrms
LP8340I Electrical Characteristics
Unless otherwise specified all limits guaranteed for VIN = VO+ 1V, CIN = COUT = 10µF, TJ = 25˚C. Boldface limits apply over
the full operating temperature range of TJ = −40˚C to 125˚C
Symbol
Parameter
Conditions
Min
Typ
Max
Units
(Note 5) (Note 4) (Note 5)
VIN Input Voltage
LP8340-ADJ,1.8, 2.5
LP8340-3.3, 5.0
2.7 10
V
10
5 www.national.com
5 Page 
Applications Section
GENERAL INFORMATION
The LP8340 is a low-dropout, low quiescent current linear
regulator. As shown in Figure 1 it consists of a 1.25V refer-
ence, error amplifier, MOSFET driver, PMOS pass transistor
and for the fixed output versions, an internal feedback net-
work (R1/R2). In addition, the device is protected from over-
load by a thermal shutdown circuit and a foldback current
limit circuit
The 1.25V reference is connected to the inverting input of
the error amplifier. Regulation of the output voltage is
achieved by means of negative feedback to the non-
inverting input of the error amplifier. Feedback resistors R1
and R2 are either internal or external to the device, depend-
ing on whether it is a fixed voltage version or the adjustable
version. The negative feedback and high open loop gain of
the error amplifier cause the two inputs of the error amp to be
virtually equal in voltage. If the output voltage changes due
to load changes, the error amplifier and MOSFET driver
provide the appropriate drive to the pass transistor to main-
tain the error amplifier’s inputs as virtually equal.
FIGURE 1. LP8340 Functional Block Diagram
20060903
EXTERNAL CAPACITOR
An Input capacitor of 1µF or greater is required between the
LP8340 VIN pin and ground. While 1µF will provide adequate
bypassing of the VIN supply larger values of input capacitor
(i.e. 10µF) can provide improved bypassing of power supply
noise.
Stable operation can be achieved with an output capacitor of
1µF or greater, either ceramic X7R dielectric or aluminum/
tantalum electrolytic. While the minimum capacitor value is
1µF, the typical output capacitor values selected range from
1µF to 10µF. The larger values provide improved load-
transient response, power supply rejection and stability.
OUTPUT VOLTAGE SETTING (ADJ VERSION ONLY)
The output voltage is set according to the amount of nega-
tive feedback (Note that the pass transistor inverts the feed-
back signal). This feedback is determined by R1 and R2 with
the resulting output voltage represented by the following
equation:
Use the following equation to determine the values of R1 and
R2 for a desired VOUT (R2 = 100Ω is recommended).
MINIMUM LOAD CURRENT
A minimum load of 100µA is required for regulation and
stability over the entire operating temperature range. If ac-
tual load current fall below 100µA it is recommended that a
resistor of value RL = VO/100µA be placed between VO and
ground.
11 www.national.com
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LP8340ILDX-3.3.PDF ] | |
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