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AD5421 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5421
Beschreibung 4mA to 20mA DAC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
AD5421 Datasheet, Funktion
Data Sheet
16-Bit, Serial Input,
Loop-Powered, 4 mA to 20 mA DAC
AD5421
FEATURES
GENERAL DESCRIPTION
16-bit resolution and monotonicity
Pin selectable NAMUR-compliant ranges
4 mA to 20 mA
3.8 mA to 21 mA
3.2 mA to 24 mA
NAMUR-compliant alarm currents
Downscale alarm current = 3.2 mA
Upscale alarm current = 22.8 mA/24 mA
Total unadjusted error (TUE): 0.05% maximum
INL error: 0.0035% FSR maximum
Output TC: 3 ppm/°C typical
Quiescent current: 300 µA maximum
Flexible SPI-compatible serial digital interface
with Schmitt triggered inputs
On-chip fault alerts via FAULT pin or alarm current
Automatic readback of fault register on each write cycle
Slew rate control function
Gain and offset adjust registers
On-chip reference TC: 4 ppm/°C maximum
Selectable regulated voltage output
Loop voltage range: 5.5 V to 52 V
Temperature range: −40°C to +105°C
TSSOP and LFCSP packages
APPLICATIONS
Industrial process control
4 mA to 20 mA loop-powered transmitters
Smart transmitters
HART network connectivity
The AD5421 is a complete, loop-powered, 4 mA to 20 mA
digital-to-analog converter (DAC) designed to meet the needs
of smart transmitter manufacturers in the industrial control
industry. The DAC provides a high precision, fully integrated,
low cost solution in compact TSSOP and LFCSP packages.
The AD5421 includes a regulated voltage output that is used to
power itself and other devices in the transmitter. This regulator
provides a regulated 1.8 V to 12 V output voltage. The AD5421
also contains 1.22 V and 2.5 V references, thus eliminating the
need for a discrete regulator and voltage reference.
The AD5421 can be used with standard HART® FSK protocol
communication circuitry without any degradation in specified
performance. The high speed serial interface is capable of operating
at 30 MHz and allows for simple connection to commonly used
microprocessors and microcontrollers via a SPI-compatible, 3-wire
interface.
The AD5421 is guaranteed monotonic to 16 bits. It provides
0.0015% integral nonlinearity, 0.0012% offset error, and
0.0006% gain error under typical conditions.
The AD5421 is available in a 28-lead TSSOP and a 32-lead LFCSP
specified over the extended industrial temperature range of
−40°C to +105°C.
COMPANION LOW POWER PRODUCTS
HART Modem: AD5700, AD5700-1
Microcontroller: ADuCM360
FUNCTIONAL BLOCK DIAGRAM
IODVDD DVDD
VLOOP REG_SEL0 REG_SEL1 REG_SEL2 REGOUT REGIN
FAULT
SYNC
SCLK
SDIN
SDO
LDAC
RANGE0
RANGE1
ALARM_CURRENT_DIRECTION
RINT/REXT
INPUT
REGISTER
CONTROL
LOGIC
GAIN/OFFSET
ADJUSTMENT
REGISTERS
LOOP
VOLTAGE
MONITOR
16 16-BIT
DAC
TEMPERATURE
SENSOR
VREF
RSET
24kΩ
VOLTAGE
REGULATOR
DRIVE
11.5kΩ 52Ω
AD5421
COM
LOOP–
REFOUT2 REFOUT1
REFIN
Figure 1.
CIN REXT1 REXT2
Rev. H
Document Feedback
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responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2011–2014 Analog Devices, Inc. All rights reserved.
Technical Support
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AD5421 Datasheet, Funktion
Data Sheet
Parameter1
Gain Error TC3
Full-Scale Error
Full-Scale Error TC3
Downscale Alarm Current
Upscale Alarm Current
Min
−0.047
−0.028
3.08
22.78
Typ
1
±0.0017
1
OUTPUT CHARACTERISTICS3
Loop Compliance Voltage4
Loop Current Long-Term Stability
23.99
LOOP− + 5.5
LOOP− + 12.5
100
15
Loop Current Error vs. REGOUT Load
Current
Resistive Load
Inductive Load
Power Supply Sensitivity
Output Impedance
Output TC
0
12
Output Noise
0.1 Hz to 10 Hz
500 Hz to 10 kHz
1.2
50
400
3
1
50
0.2
Noise Spectral Density
REFERENCE INPUT (REFIN PIN)3
Reference Input Voltage5
DC Input Impedance
REFERENCE OUTPUTS
REFOUT1 Pin
Output Voltage
Temperature Coefficient
75
2.498
Output Noise (0.1 Hz to 10 Hz)3
Noise Spectral Density3
Output Voltage Drift vs. Time3
Capacitive Load3
Load Current3, 6
Short-Circuit Current3
Power Supply Sensitivity3
Thermal Hysteresis3
Load Regulation3
Output Impedance
REFOUT2 Pin
Output Voltage
Output Impedance
1.18
195
256
2.5
800
2.5
1.5
2
4
7.5
245
70
200
10
4
6.5
2
285
5
0.1
0.1
1.227
72
Max
+0.047
+0.028
3.21
23
24.01
2
0.1
2.503
4
8
10
12
0.2
1.28
Rev. H | Page 5 of 36
AD5421
Unit
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
mA
mA
mA
Test Conditions/Comments
TA = 25°C
4 mA to 20 mA and 3.8 mA to 21 mA
ranges
3.2 mA to 24 mA range
V
V
ppm FSR
ppm FSR
µA/mA
kΩ
mH
µA/V
MΩ
ppm FSR/°C
ppm FSR/°C
REGOUT < 5.5 V, loop current = 24 mA
REGOUT = 12 V, loop current = 24 mA
Drift after 1000 hours at TA = 125°C,
loop current = 12 mA, internal RSET
Drift after 1000 hours at TA = 125°C,
loop current = 12 mA, external RSET
Loop current = 12 mA, load current
from REGOUT = 5 mA
See Figure 21 for a load line graph
Stable operation
Loop current = 12 mA
Loop current = 12 mA, internal RSET
Loop current = 12 mA, external RSET
nA p-p
mV rms
nA/√Hz
nA/√Hz
HART bandwidth; measured across
500 Ω load
At 1 kHz
At 10 kHz
V For specified performance
MΩ
V
ppm/°C
ppm/°C
ppm/°C
µV p-p
nV/√Hz
nV/√Hz
ppm
nF
mA
mA
µV/V
ppm
ppm
mV/mA
V
kΩ
TA = 25°C
C grade
B grade
A grade
At 1 kHz
At 10 kHz
Drift after 1000 hours at TA = 125°C
Recommended operation
Short circuit to COM
First temperature cycle
Second temperature cycle
Measured at 0 mA and 1 mA loads
TA = 25°C

6 Page









AD5421 pdf, datenblatt
Data Sheet
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted. Transient currents of up
to 100 mA do not cause SCR latch-up.
Table 6.
Parameter
REGIN to COM
REGOUT to COM
Digital Inputs to COM,
RANGE0, RANGE1, RINT/REXT,
ALARM_CURRENT_DIRECTION,
REG_SEL0, REG_SEL1, REG_SEL2
Digital Inputs to COM
SCLK, SDIN, SYNC, LDAC
Digital Outputs to COM,
SDO, FAULT
REFIN to COM
REFOUT1, REFOUT2
VLOOP to COM
LOOP− to COM
DVDD to COM
IODVDD to COM
REXT1, CIN to COM
REXT2 to COM
DRIVE to COM
Operating Temperature Range (TA)
Industrial
Storage Temperature Range
Junction Temperature (TJ MAX)
Power Dissipation
Lead Temperature,
Soldering (10 sec)
ESD
Human Body Model
Field Induced Charged Device
Model
Machine Model
Rating
−0.3 V to +60 V
−0.3 V to +14 V
−0.3 V to DVDD + 0.3 V
or +7 V (whichever is less)
−0.3 V to IODVDD + 0.3 V
or +7 V (whichever is less)
−0.3 V to IODVDD + 0.3 V
or +7 V (whichever is less)
−0.3 V to +7 V
−0.3 V to +4.7 V
−0.3 V to +60 V
−5 V to +0.3 V
−0.3 V to +7 V
−0.3 V to +7 V
−0.3 V to +4.3 V
−0.3 V to +0.3 V
−0.3 V to +11 V
−40°C to +105°C
−65°C to +150°C
125°C
(TJ MAX − TA)/θJA
JEDEC Industry Standard
J-STD-020
3 kV
2 kV
200 V
AD5421
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a
stress rating only; functional operation of the product at these
or any other conditions above those indicated in the operational
section of this specification is not implied. Operation beyond
the maximum operating conditions for extended periods may
affect product reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 7. Thermal Resistance
Package Type
28-Lead TSSOP_EP (RE-28-2)
32-Lead LFCSP_WQ (CP-32-11)
θJA1
32
40
θJC
9
7
Unit
°C/W
°C/W
1 Thermal impedance simulated values are based on JEDEC 2S2P thermal test
board with thermal vias. See JEDEC JESD51.
ESD CAUTION
Rev. H | Page 11 of 36

12 Page





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