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PDF HT82B40A Data sheet ( Hoja de datos )
| Número de pieza | HT82B40A | |
| Descripción | I/O MCU | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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www.DataSheet4U.com
HT82B40R/HT82B40A
I/O MCU with USB Interface
Technical Document
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
· Operating voltage:
fSYS=6M/12MHz: 3.3V~5.5V
· Low voltage reset function
· 34 bidirectional I/O lines (max.)
· 8-bit programmable timer/event counter with
overflow interrupt
· 16-bit programmable timer/event counter and
overflow interrupts
· Watchdog Timer
· PS2 and USB modes supported
· USB 2.0 low speed function
· 3 endpoints supported - endpoint 0 included
· 4096´15 program memory
· 160´8 data memory RAM
· Integrated 1.5kW resistor between V33O and
USBPDN pins for USB applications
· Fully integrated 6MHz or 12MHz oscillator
· All I/O pins have wake-up functions
· Power-down function and wake-up feature reduce
power consumption
· 8-level subroutine nesting
· Up to 0.33ms instruction cycle with 12MHz system
clock at VDD=5V
· Bit manipulation instruction
· 15-bit table read instruction
· 63 powerful instructions
· All instructions in one or two machine cycles
· 20/28/48-pin SSOP, 20/32-pin QFN packages
General Description
The HT82B40R and HT82B40A are 8-bit high perfor-
mance, RISC architecture microcontroller devices spe-
cifically designed for multiple I/O control product
applications.
The advantages of low power consumption, I/O flexibility,
timer functions, integrated USB interface, Power Down
and wake-up functions, Watchdog timer etc, make the
devices extremely suitable for use in computer peripheral
product applications as well as many other applications
such as industrial control, consumer products, subsys-
tem controllers, etc.
The HT82B40A mask version type is fully pin and func-
tionally compatible with the HT82B40R OTP version de-
vice.
Rev. 1.20
1 July 22, 2010
1 page  
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HT82B40R/HT82B40A
A.C. Characteristics
Ta=25°C
Symbol
Parameter
Test Conditions
VDD Conditions
fRCSYS RC Clock with 8-bit Prescaler Register
5V
¾
tWDT
Watchdog Time-out Period
(System Clock)
¾¾
tUSB USBPDP, USBPDN Rising & Falling Time ¾
¾
tOST Oscillation Start-up Timer Period
¾¾
tOSCsetup Crystal Setup
¾¾
fINO125V
Internal Oscillator Frequency for 12MHz
4.0V~
5.5V
¾
fINO123V
Internal Oscillator Frequency for 12MHz
3.0~
4.0V
¾
fINOUSB
Internal Oscillator Frequency with USB
Mode
4.2~
5.5V
¾
Min. Typ. Max. Unit
¾ 32 ¾ kHz
1024
¾
¾ 1/fRCSYS
75 ¾ 300 ns
¾ 1024 ¾
tSYS
¾ 5 ¾ ms
10.80 12.00 13.20 MHz
10.56 12.00 13.44 MHz
11.82 12.00 12.18 MHz
Note:
tSYS=1/fSYS
Power_on period = tWDT + tOST + tOSCsetup
WDT Time_out in Normal Mode = 1/ fRCSYS ´ 256 ´ WDTS + tWDT
WDT Time_out in Power Down Mode = 1/ fRCSYS ´ 256 ´ WDTS + tOST + tOSCsetup
Trimmed for 5V operation using factory trim values. Frequency Trim to 12MHz ±3%
Rev. 1.20
5 July 22, 2010
5 Page 
Special Purpose Data Memory
This area of Data Memory is where registers, necessary
for the correct operation of the microcontroller, are
stored. It is divided into two banks, Bank 0 and Bank1.
Most of the registers are both readable and writeable
but some are protected and are readable only, the de-
tails of which are located under the relevant Special
Function Register section. Note that for locations that
are unused, any read instruction to these addresses will
return the value ²00H².
The Special Purpose Registers for the USB interface
are stored in Bank 1 which can only be accessed by first
setting the Bank Pointer to a value of 01H and then us-
ing Indirect Addressing Register IAR1 and Memory
Pointer MP1. Bank 1 can only be accessed indirectly us-
ing the MP1 Memory Pointer, direct addressing is not
possible.
B ank0
0 0 H IA R 0
01H M P 0
0 2 H IA R 1
03H M P 1
04H B P
05H A C C
06H P C L
07H TB LP
08H TB LH
09H W D TS
0A H S TA TU S
0 B H IN T C
0C H
0D H TM R 0
0E H TM R 0C
0FH TM R 1H
10H TM R 1L
11H TM R 1C
12H P A
13H P A C
14H P B
15H P B C
16H P C
17H P C C
18H P D
19H P D C
1A H P E
1B H P E C
1C H
1D H
1E H
1FH TB H P
20H U S C
21H U S R
22H S C C
23H
B ank1
40H U S B _S TA T
4 1 H P IP E _ C T R L
42H A W R
43H S TA LL
4 4 H P IP E
4 5 H S IE S
4 6 H M IS C
47H E N D P T_E N
4 8 H F IF O 0
4 9 H F IF O 1
4 A H F IF O 2
: U n u s e d re a d a s "0 "
Special Purpose Data Memory
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HT82B40R/HT82B40A
Special Function Registers
To ensure successful operation of the microcontroller,
certain internal registers are implemented in the Data
Memory area. These registers ensure correct operation
of internal functions such as timers, interrupts, etc., as
well as external functions such as I/O data control. The
location of these registers within the Data Memory be-
gins at the address 00H. Any unused Data Memory lo-
cations between these special function registers and the
point where the General Purpose Memory begins is re-
served and attempting to read data from these locations
will return a value of 00H.
Indirect Addressing Register - IAR0, IAR1
The Indirect Addressing Registers, IAR0 and IAR1, al-
though having their locations in normal RAM register
space, do not actually physically exist as normal regis-
ters. The method of indirect addressing for RAM data
manipulation uses these Indirect Addressing Registers
and Memory Pointers, in contrast to direct memory ad-
dressing, where the actual memory address is speci-
fied. Actions on the IAR0 and IAR1 registers will result in
no actual read or write operation to these registers but
rather to the memory location specified by their corre-
sponding Memory Pointer, MP0 or MP1. Acting as a
pair, IAR0 and MP0 can together only access data from
Bank 0, while the IAR1 and MP1 register pair can ac-
cess data from both Bank 0 and Bank 1. As the Indirect
Addressing Registers are not physically implemented,
reading the Indirect Addressing Registers indirectly will
return a result of ²00H² and writing to the registers indi-
rectly will result in no operation.
Memory Pointer - MP0, MP1
For all devices, two Memory Pointers, known as MP0
and MP1 are provided. These Memory Pointers are
physically implemented in the Data Memory and can be
manipulated in the same way as normal registers pro-
viding a convenient way with which to address and track
data. When any operation to the relevant Indirect Ad-
dressing Registers is carried out, the actual address that
the microcontroller is directed to, is the address speci-
fied by the related Memory Pointer. MP0 can only ac-
cess data in Bank 0 while MP1 can access both banks.
Rev. 1.20
11 July 22, 2010
11 Page | ||
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