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73S8014RN Schematic ( PDF Datasheet ) - Teridian Semiconductor

Teilenummer 73S8014RN
Beschreibung Smart Card Interface
Hersteller Teridian Semiconductor
Logo Teridian Semiconductor Logo 




Gesamt 28 Seiten
73S8014RN Datasheet, Funktion
Simplifying System Integration™
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73S8014RN
Smart Card Interface
DATA SHEET
December 2008
DESCRIPTION
The Teridian 73S8014RN is a single smart card (ICC) interface
circuit, firmware compatible with 8024-type devices for
configurations where only asynchronous cards must be
supported. It is derived from the 73S8024RN industry-
standard electrical interface. The 73S8014RN has been
optimized to match most of the typical Set-Top Box / A/V
Conditional Access applications. Optimization essentially
involved a smaller pin-count and support for single I/O.
The 73S8014RN interfaces with the host processor through the
same bus (digital I/Os) as the 73S8024RN, which is compatible
with any other 8024-type IC. As a result, the 73S8014RN is a
very attractive cost-reduction path from traditional 8024
ICs.
The 73S8014RN has been designed to provide full electrical
compliance with ISO 7816-3, EMV 4.0 and NDS specifications.
Interfacing with the system controller is done through a control
bus, composed of digital inputs to control the interface, and
one interrupt output to inform the system controller of the card
presence and faults.
The card clock can be generated by an on-chip oscillator using
an external crystal or by connection to an externally supplied
clock signal. In addition, the clock divider provides divisor
values of divide by 1, 2, 4 and 6 that are compatible with NDS
requirements.
The 73S8014RN incorporates an ISO 7816-3
activation/deactivation sequencer that controls the card
signals. Level-shifters drive the card signals with the selected
card voltage (3V or 5V), coming from an internal Low Drop-Out
(LDO) voltage regulator. This LDO regulator is powered by a
dedicated power supply input VPC. Digital circuitry is powered
separately by a digital power supply VDD. With its embedded
LDO regulator, the 73S8014RN is a cost-effective solution for
any application where a 5V (typically -5% +10%) power supply
is available.
Emergency card deactivation is initiated upon card extraction
or upon any fault detected by the protection circuitry. The fault
can be a card over-current, VCC undervoltage or power supply
fault (VDD). The card over-current circuitry is a true current
detection function, as opposed to VCC voltage drop detection,
as usually implemented in non-Teridian 8024 interface ICs.
The VDD voltage fault has a threshold voltage that can be
adjusted with an external resistor network. It allows automated
card deactivation at a customized VDD voltage threshold value.
It can be used, for instance, to match the system controller
operating voltage range.
APPLICATIONS
Set-Top Box Conditional Access and Pay-per-View
General purpose smart card readers
ADVANTAGES
NDS compliant
All NDS frequency divider rates of 4.5, 6.75 and
13.5MHz are supported from a 27MHz clock source
Same advantages as the Teridian 73S80xxR family:
ƒ Card VCC generated by an LDO regulator
ƒ Very low power dissipation (saves up to 1/2W)
ƒ Fewer external components are required
ƒ Better noise performance
True card over-current detection
Firmware compatibility with all 8024 ICs
Small format 20SO package
FEATURES
Card Interface:
ƒ Complies with ISO 7816-3, EMV 4.0 and NDS
ƒ 73S8014RN device supports 3V / 5V cards up to 65mA
ƒ ISO 7816-3 Activation / Deactivation sequencer
ƒ Automated deactivation upon hardware fault (i.e. upon
drop on VDD power supply or card overcurrent)
ƒ The VDD voltage supervisor threshold value (fault) can
be externally adjusted
ƒ Over-current detection 130mA max
ƒ Card CLK clock frequency up to 20MHz
System Controller Interface:
ƒ 3 Digital inputs control the card activation / deactivation,
card reset and card voltage
ƒ 2 Digital inputs control the card clock frequency
ƒ 1 Digital output, interrupt to the system controller,
reports to the host the card presence and faults
ƒ Crystal oscillator or host clock, up to 27MHz
Regulator Power Supply:
ƒ 4.75V to 5.5V (EMV 4.0)
ƒ 4.85V to 5.5V (NDS)
Digital Interfacing: 2.7V to 5.5V
6kV ESD protection on the card interface
Package: SO 20-pin
RoHS compliant (6/6) lead-free package
Rev. 1.0
© 2008 Teridian Semiconductor Corporation
1






73S8014RN Datasheet, Funktion
73S8014RN Data Sheet
DwwSw_.8D0at1aS4hReeNt4U_.0co1m4
Table 1 provides the 73S8014RN pin names, pin numbers, type, equivalent circuits and descriptions.
Table 1: 73S8014RN 20-Pin SOP Pin Definitions
Pin Name
Pin Equivalent
Number Type Circuit
Description
Card Interface
I/O
RST
14
15
IO
Figure 14
Card I/O: Data signal to/from card. Includes an 11K pull-up
resistor to VCC.
O Figure 13 Card reset: provides reset (RST) signal to card.
CLK
Card clock: provides clock signal (CLK) to card. The rate of this
17
O
Figure 12
clock is determined by the external crystal frequency or
frequency of the external clock signal applied on XTALIN and
CLKDIV selections.
PRES
19
I
Figure 16
Card Presence switch: active high indicates card is present.
Includes a high-impedance pull-down current source.
VCC
Card power supply – logically controlled by sequencer, output of
18 PSO Figure 11 LDO regulator. Requires an external filter capacitor to the card
GND.
GND
16 GND
– Card ground.
Host Processor Interface
CMDVCC
6
I
Command VCC (negative assertion): Logic low on this pin
Figure 16 causes the LDO regulator to ramp the VCC supply to the card
and initiates a card activation sequence, if a card is present.
5V/#V
5 volt / 3 volt card selection: Logic high selects 5 volts for VCC
and card interface, logic low selects 3 volt operation. When the
part is to be used with a single card voltage, this pin should be
7 I Figure 16 tied to either GND or VDD. However, it includes a high
impedance pull-up resistor to default this pin high (selection of
5V card) when not connected. This pin shall not be changed
when CMDVCC is low.
CLKDIV1
CLKDIV2
Sets the divide ratio from the XTAL oscillator (or external clock
input) to the card clock. These pins include a pull-up resistor for
CLKDIV1 and CLKLDIV2 to provide a default rate of divide by
20
5
two.
I Figure 16
CLKDIV1
0
CLKDIV2
0
CLOCK RATE
XTALIN/6
0 1 XTALIN/4
1 1 XTALIN/2
1 0 XTALIN
OFF
RSTIN
Interrupt signal to the processor. Active Low - Multi-function
1 O Figure 10 indicating fault conditions and card presence. Open drain output
configuration – It includes an internal 20kpull-up to VDD.
2 I Figure 16 Reset Input: This signal is the reset command to the card.
I/OUC
3
IO
Figure 15
System controller data I/O to/from the card. Includes an 11K
pull-up resistor to VDD.
6 Rev. 1.0

6 Page









73S8014RN pdf, datenblatt
73S8014RN Data Sheet
DwwSw_.8D0at1aS4hReeNt4U_.0co1m4
Oscillator (XTALIN) I/O Parameters
VILXTAL Input Low Voltage - XTALIN
VIHXTAL Input High Voltage - XTALIN
IILXTAL
fMAX
Input Current - XTALIN
Max freq. Osc or external clock
δin External input duty cycle limit
GND < VIN < VDD
tR/F < 10% fIN,
45% < δCLK < 55%
-0.3
0.7 VDD
-30
48
2.6 DC Characteristics
Table 7 lists the 73S8014RN DC characteristics.
Table 7: DC Characteristics
Symbol
Parameter
IDD Supply Current
IPC Supply Current
IPCOFF
VPC supply current when VCC = 0
Condition
12 MHz XTAL
Ext CLK,
VDD = 2.7 – 3.6V,
VCC Off
Ext CLK,
VDD = 2.7 – 3.6V,
VCC On
Ext CLK,
VDD = 4.5 – 5.5V,
VCC Off
Ext CLK,
VDD = 4.5 – 5.5V,
VCC On
VCC on, ICC=0
I/O, AUX1,
AUX2=high,
Clock not toggling
CMDVCC High
Min
0.3 VDD
VDD+0.3
30
27
52
V
V
μA
MHz
%
Nom Max Unit
2.7 7.0 mA
1.7 mA
2.2 mA
2.7 mA
3 mA
450 700 μA
345 650 μA
2.7 Voltage Fault Detection Circuits
Table 8 lists the 73S8014RN Voltage Fault Detection Circuits.
Table 8: Voltage Fault Detection Circuits
Symbol
VDDF
VCCF
Parameter
VDD fault
(VDD Voltage supervisor
threshold)
VCC fault
(VCC Voltage supervisor
threshold)
Condition
No external resistor
on VDDF_ADJ pin
VCC = 5v
VCC= 3v
Min
2.15
Nom
Max
2.4
4.6
2.7
Unit
V
V
V
12 Rev. 1.0

12 Page





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