PDF ADF7242 Data sheet ( Hoja de datos )

Número de pieza	ADF7242
Descripción	Low Power IEEE 802.15.4/Proprietary GFSK/FSK Zero-IF 2.4 GHz Transceiver IC
Fabricantes	Analog Devices
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Low Power IEEE 802.15.4/Proprietarywww.DataSheet4U.com GFSK/FSK Zero-IF 2.4 GHz Transceiver IC ADF7242 FEATURES Frequency range (global ISM band) 2400 MHz to 2483.5 MHz Programmable data rates and modulation IEEE 802.15.4-2006-compatible (250 kbps) GFSK/FSK/GMSK/MSK modulation 50 kbps to 2000 kbps data rates Low power consumption 19 mA (typical) in receive mode 21.5 mA (typical) in transmit mode (PO = 3 dBm) 1.7 μA, 32 kHz crystal oscillator wake-up mode High sensitivity (IEEE 802.15.4-2006) −95 dBm at 250 kbps High sensitivity (0.1% BER) −96 dBm at 62.5 kbps (GFSK) −93 dBm at 500 kbps (GFSK) −90 dBm at 1 Mbps (GFSK) −87.5 dBm at 2 Mbps (GFSK) Programmable output power −20 dBm to +4.8 dBm in 2 dB steps Integrated voltage regulators 1.8 V to 3.6 V input voltage range Excellent receiver selectivity and blocking resilience Zero-IF architecture Complies with EN300 440 Class 2, EN300 328, FCC CFR47 Part 15, ARIB STD-T66 Digital RSSI measurement Fast automatic VCO calibration Automatic RF synthesizer bandwidth optimization On-chip low power processor performs Radio control Packet management Packet management support Insertion/detection of preamble/SWD/CRC/address IEEEE 802.15.4-2006 frame filtering IEEEE 802.15.4-2006 CSMA/CA unslotted modes Flexible 256-byte transmit/receive data buffer IEEEE 802.15.4-2006 and GFSK/FSK SPORT modes Fast settling automatic frequency control Flexible multiple RF port interface External PA/LNA support hardware Switched antenna diversity support Wake-up timer Very few external components Integrated PLL loop filter, receive/transmit switch, battery monitor, temperature sensor, 32 kHz RC and crystal oscillators Flexible SPI control interface with block read/write access Small form factor 5 mm × 5 mm 32-lead LFCSP package APPLICATIONS Wireless sensor networks Automatic meter reading/smart metering Industrial wireless control Healthcare Wireless audio/video Consumer electronics ZigBee FUNCTIONAL BLOCK DIAGRAM ADF7242 LNA1 LNA2 PA DAC ADC ADC DAC FSK DEMOD 8-BIT PROCESSOR DSSS DEMOD AGC OCL AFC CDR RADIO CONTROLLER PACKET MANAGER FRACTIONAL-N RF SYNTHESIZER GAUSSIAN FILTER PRE-EMPHASIS FILTER WAKE-UP CTRL 4kB PROGRAM ROM 2kB PROGRAM RAM 256-BYTE PACKET RAM 64-BYTE BBRAM 256-BYTE MCR SPI LDO × 4 BIAS BATTERY TEMPERATURE MONITOR SENSOR 26MHz OSC 32kHz RC OSC 32kHz XTAL OSC GPIO SPORT IRQ Figure 1 Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2010 Analog Devices, Inc. All rights reserved. 1 page ADF7242www.DataSheet4U.com RFIO1P RFIO1N RFIO2P RFIO2N PABIAOP_ATB4 PAVSUP_ATB3 ADF7242 LNA1 LNA2 DAC ADC ADC DAC FSK DEMOD DSSS DEMOD AGC OCL AFC CDR 8-BIT PROCESSOR RADIO CONTROLLER PACKET MANAGER PA DIV2 DIVIDER SDM PRE-EMPHASIS FILTER FSK MOD DSSS MOD EXT PA INTERFACE CHARGE- PUMP LOOP FILTER PFD GAUSSIAN Tx FILTER WAKE-UP CTRL PA BATTERY TEMPERATURE ANALOG RAMP MONITOR SENSOR TEST LDO1 LDO2 LDO3 LDO4 BIAS 26MHz OSC RC CAL TIMER UNIT 32kHz RC OSC 32kHz XTAL OSC 4kB PROGRAM ROM 2kB PROGRAM RAM 256- BYTE PACKET RAM 64-BYTE BBRAM 256-BYTE MCR SPI EXT LNA/PA ENABLE GPIO SPORT IRQ CS MOSI SCLK MISO RXEN_GP6 TXEN_GP5 TRCLK_CKO_GP3 DT_GP1 DR_GP0 IRQ1_GP4 IRQ2_TRFS_GP2 CREGRF1, CREGVCO CREGSYNTH CREGDIG1, RBIAS XOSC26P XOSC26N CREGRF2, CREGDIG2 CREGRF3 XOSC32KN_ATB2 XOSC32KP_GP7_ATB1 Figure 2. Detailed Functional Block Diagram Rev. 0 \| Page 5 of 108 5 Page Parameter Modulated Blocking Rejection (2000 kbps (fDEV = ±500 kHz) GFSK Packet Mode) ±2 MHz ±5 MHz ±12 MHz ±20 MHz ±32 MHz Co-Channel Rejection Min Typ Max 52.5 60 64.5 68.5 71 −13 −9 Receiver Channel Bandwidth Minimum Channel 3 dB Bandwidth Analog Filter Analog and Digital Filter Cascade Maximum Channel 3 dB Bandwidth Frequency Error Tolerance, 2000 kbps (fDEV = ±500 kHz) GFSK Packet Mode AFC Off AFC On Frequency Error Tolerance, 500 kbps (fDEV = ±250 kHz) FSK Packet Mode AFC Off AFC On RSSI, 2000 kbps (fDEV = ±500 kHz) GFSK Mode Accuracy Minimum Sensitivity, Packet Mode Minimum Sensitivity, SPORT Mode RSSI, 500 kbps (fDEV = ±250 kHz) GFSK Mode Accuracy Minimum Sensitivity, Packet Mode Minimum Sensitivity, SPORT Mode 1110 520 2252 ±55 ±165 ±90 ±190 ±3 −84.5 −87.5 ±3 −92 −93 Unit dB dB dB dB dB dB dB kHz kHz kHz kHz kHz kHz kHz dBm dBm dBm dBm dBm dBm ADF7242www.DataSheet4U.com Test Conditions PRF,IN = PRF,IN,MIN, 125 kbps + 3 dB 2000 kbps (fDEV = ±500 kHz) GFSK packet mode, PRF,IN = PRF,IN,MIN, 2 Mbps + 10 dB, modulated blocker 250 kbps (fDEV = ±130 kHz) GFSK packet mode, PRF,IN = PRF,IN,MIN, 250 kbps + 10 dB, modulated blocker Two-sided bandwidth Two-sided bandwidth Two-sided bandwidth AFC pull-in range = ±80 kHz AFC pull-in range = ±80 kHz SPORT mode with no preamble or SWD detection SPORT mode with no preamble or SWD detection AUXILIARY SPECIFICATIONS Table 5. Parameter 32 kHz RC OSCILLATOR Frequency Frequency Accuracy Frequency Drift Temperature Coefficient Voltage Coefficient Calibration Time 32 kHz CRYSTAL OSCILLATOR Frequency Maximum ESR Start-Up Time WAKE-UP TIMER Prescaler Tick Period Wake-Up Period Min Typ Max Unit Test Conditions 32.768 1 kHz After calibration % After calibration at 25°C 0.14 %/°C 4 %/V 1 ms 32.768 319.8 2000 kHz kΩ 10 pF on XOSC32KP and XOSC32KN ms 12.5pF load capacitors on XOSC32KP and XOSC32KN 0.0305 61 × 10−6 20,000 ms 1.31 × 105 sec Rev. 0 \| Page 11 of 108 11 Page

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