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PDF LTC4362-2 Data sheet ( Hoja de datos )

Número de pieza LTC4362-2
Descripción 1.2A Overvoltage/ Overcurrent Protector
Fabricantes Linear Technology 
Logotipo Linear Technology Logotipo



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LTC4362-1/LTC4362-2
1.2A Overvoltage/
Overcurrent Protector
FEATURES
n 2.5V to 5.5V Operation
n Overvoltage Protection Up to 28V
n Internal 40mΩ N-Channel MOSFET and 31mΩ RSENSE
n Avalanche Rated MOSFET Requires No Input
Capacitor or TVS for Most Applications
n <1μs Overvoltage Turn-Off, Gentle Shutdown
n 2% Accurate 5.8V Overvoltage Threshold
n 20% Accurate 1.5A Overcurrent Threshold
n Input Withstands Up to ±25kV HBM ESD with 1μF COUT
n Controlled Power-Up dV/dt Limits Inrush Current
n Reverse Voltage Protection Driver
n Low Current Shutdown
n Latchoff (LTC4362-1) or Auto-Retry (LTC4362-2)
After Overcurrent
n Available in 8-Lead DFN 2mm × 3mm Package
APPLICATIONS
n USB Protection
n Handheld Computers
n Cell/Smart Phones
n MP3/MP4 Players
n Digital Cameras
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT, PowerPath and Hot Swap are trademarks of Linear Technology Corporation. All other
trademarks are the property of their respective owners.
DESCRIPTION
The LTC®4362 monolithic overvoltage/overcurrent protec-
tor safeguards 2.5V to 5.5V systems from power supply
overvoltage. It is designed for portable devices with multiple
power supply options including wall adaptors, car battery
adaptors and USB ports.
The LTC4362 controls an internal 40mΩ N-channel MOSFET
in series with the input power supply. During overvoltage
transients, the LTC4362 turns off the MOSFET within 1μs,
isolating downstream components from the input supply.
In most applications, the LTC4362 rides through induc-
tive cable transients without requiring transient voltage
suppressors or other external components. An internal
current sense resistor is used to implement overcurrent
protection.
The LTC4362 has a delayed start-up at plug-in and con-
trolled dV/dt ramp-up for inrush current limiting. A PWRGD
pin provides power good monitoring for VIN. The LTC4362
features a soft-shutdown controlled by the ON pin and
drives an optional external P-channel MOSFET for negative
voltage protection. Following an overvoltage condition, the
LTC4362 automatically restarts with a 130ms delay. After
an overcurrent fault, the LTC4362-1 remains off while the
LTC4362-2 automatically restarts after a 130ms delay.
TYPICAL APPLICATION
Protection from Overvoltage and Overcurrent
VIN
5V
IN OUT
VOUT
5V
0.5A
LTC4362
COUT
ON PWRGD
GND
436212 TA01a
Output Protected from Overvoltage at Input
VIN
VIN, VOUT
5V/DIV
VOUT
COUT = 10μF
0.2μs/DIV
436212 TA01b
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LTC4362-2 pdf
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LTC4362-1/LTC4362-2
TYPICAL PERFORMANCE CHARACTERISTICS
Specifications are at TA = 25°C, VIN = 5V, VON = 0V unless otherwise noted.
Normal Start-Up Sequence
Turn-On Ramp-Up
Entering Sleep Mode
VIN
5V/DIV
VOUT
5V/DIV
ICABLE
0.5A/DIV
20ms/DIV
FIGURE 4 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
VIN
5V/DIV
VOUT
5V/DIV
ICABLE
0.5A/DIV
436212 G10
1ms/DIV
FIGURE 4 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
VIN
5V/DIV
VOUT
5V/DIV
VON
5V/DIV
ICABLE
0.5A/DIV
436212 G11
50μs/DIV
FIGURE 4 CIRCUIT
RIN = 150mΩ, LIN = 0.7μH
LOAD = 10Ω, COUT = 10μF
436212 G12
PIN FUNCTIONS
GATEP: Gate Drive for External P-channel MOSFET. GATEP
connects to the gate of an optional external P-channel
MOSFET to protect against negative voltages at IN. Inter-
nally clamped to 5.8V below VIN. An internal 2M resistor
connects this pin to ground. Connect to IN if unused.
GND: Device Ground.
IN: Supply Voltage Input. Connect this pin to the input
power supply. This pin has an overvoltage threshold of
5.8V. After an overvoltage event, this pin must fall below
VIN(OV) ΔVOV to release the overvoltage lockout. During
lockout, the internal N-channel MOSFET remains off and
the PWRGD pull-down releases.
ON: On Control Input. A logic low at ON enables the
LTC4362. A logic high at ON activates a low current pull-
down on the gate of the internal N-channel MOSFET and
causes the LTC4362 to enter a low current sleep mode. An
internal 5μA current pulls ON down to ground. Connect
to ground or leave open if unused.
OUT: Source of Internal N-Channel MOSFET. Connect to
load.
PWRGD: Power Good Status. Open-drain output with
internal 500k resistive pull-up to OUT. Pulls low 65ms
after the MOSFET gate ramps above its internal gate high
threshold.
SENSE, Exposed Pad: Current Sense Node and Internal
N-Channel MOSFET Drain. An internal sense resistor
between IN and SENSE is used to implement the 1.5A
overcurrent threshold. The exposed pad is connected to
SENSE and must be soldered to an electrically isolated
printed circuit board trace to properly transfer the heat
out of the package. To disable the overcurrent function,
connect SENSE and the exposed pad to IN.
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LTC4362-2 arduino
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LTC4362-1/LTC4362-2
APPLICATIONS INFORMATION
COUT is the decoupling capacitor of the protected circuit
and its value is largely determined by the circuit require-
ments. Using a larger COUT works with LIN to slow down
the dV/dt at OUT, allowing time for the LTC4362 to shut
off its MOSFET before VOUT overshoots to a dangerous
voltage. A larger COUT also helps to lower the ΔVOUT due
to the discharge of energy in LIN if the MOSFET BVDSS is
used as an input clamp.
Layout Considerations
Figure 9 shows an example PCB layout for the LTC4362
with an external P-channel MOSFET for negative voltage
protection. Keep the traces to the internal N-channel
MOSFET wide and short. The PCB traces associated with
the power path through the internal N-channel MOSFET
should have low resistance.
SUPPLY
65 4
Si1471DH
12 3
1
LTC4362
2
9
3
4
GND
8
OUT
7
6
5
436212 F08
Figure 9. Layout for External P-channel MOSFET Configuration
PACKAGE DESCRIPTION
DC Package
8-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1718 Rev A)
0.70 p0.05
2.00 p0.10
(2 SIDES)
R = 0.115
R = 0.05
TYP
TYP
5
0.40 p 0.10
8
3.50 p0.05
2.10 p0.05
1.35 p0.05
1.65 p 0.05
PACKAGE
OUTLINE
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
1.35 REF
0.25 p 0.05
0.45 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED
0.200 REF
3.00 p0.10
(2 SIDES)
0.75 p0.05
0.00 – 0.05
1.35 p0.10
1.65 p 0.10
PIN 1 NOTCH
R = 0.20 OR 0.25
s 45o CHAMFER
(DCB8) DFN 0106 REV A
41
0.23 p 0.05
0.45 BSC
1.35 REF
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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