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TJA1043 Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer TJA1043
Beschreibung High-speed CAN transceiver
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 26 Seiten
TJA1043 Datasheet, Funktion
TJA1043
High-speed CAN transceiver
Rev. 01 — 30 March 2010
www.DataSheet4U.com
Product data sheet
1. General description
The TJA1043 is a high-speed CAN transceiver that provides an interface between a
Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.
The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the
automotive industry, providing differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1043 is a step up from the TJA1041A high-speed CAN transceiver. It offers
improved ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Discharge (ESD)
performance, very low power consumption, and passive behavior when the supply voltage
is turned off. Advanced features include:
Low-power management controls the power supply throughout the node while
supporting local and remote wake-up with wake-up source recognition
Several protection and diagnostic functions including bus line short-circuit detection
and battery connection detection
Can be interfaced directly to microcontrollers with supply voltages from 3 V to 5 V
These features make the TJA1043 the ideal choice for high speed CAN networks
containing nodes that need to be available all times, even when the internal VIO and VCC
supplies are switched off.
2. Features and benefits
2.1 General
„ Fully ISO 11898-2 and ISO 11898-5 compliant
„ Suitable for 12 V and 24 V systems
„ Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
„ VIO input allows for direct interfacing with 3 V and 5 V microcontrollers
„ SPLIT voltage output for stabilizing the recessive bus level
„ Listen-only mode for node diagnosis and failure containment
2.2 Low-power management
„ Very low current Standby and Sleep modes, with local and remote wake-up
„ Capability to power down the entire node while supporting local, remote and host
wake-up
„ Wake-up source recognition
„ Transceiver disengages from the bus (zero load) when VBAT absent
„ Functional behavior predictable under all supply conditions






TJA1043 Datasheet, Funktion
NXP Semiconductors
www.DataSheet4U.com
TJA1043
High-speed CAN transceiver
LISTEN-
ONLY MODE
STB_N = H
and
EN = H
STB_N = H
and
EN = L
NORMAL
MODE
STB_N = H
and
EN = L
STB_N = H
and
EN = L
STB_N = L
and
(EN = L or Wake flag set)
STB_N = L
and
EN = L
STB_N = H
and
EN = H
STB_N = H
and
EN = H
STB_N = L and EN = H
and
Wake flag cleared
STB_N = L
and
EN = H
STANDBY
MODE
STB_N = L and EN = H
and
Wake flag cleared
GO-TO-SLEEP
MODE
STB_N = H and EN = L
STB_N = L
and
Wake flag set
STB_N = L
and
(EN = L or Wake flag set)
Wake flag cleared
and
t > th(min)
SLEEP
MODE
STB_N = H and EN = H
LEGEND:
= H, = L
logical state of pin
Fig 3. Mode transitions when valid VCC, VIO and VBAT voltages are present
015aaa063
6.1.1 Normal mode
In Normal mode, the transceiver can transmit and receive data via the bus lines CANH
and CANL (see Figure 1 for the block diagram). The differential receiver converts the
analog data on the bus lines into digital data which is output to pin RXD. The slope of the
output signals on the bus lines is controlled and optimized in a way that guarantees the
lowest possible EME. The bus pins are biased to 0.5VCC (via Ri). Pin INH is active, so
voltage regulators controlled by pin INH (see Figure 6) will be active too.
6.1.2 Listen-only mode
In Listen-only mode, the transceiver’s transmitter is disabled, effectively providing a
transceiver listen-only feature. The receiver will still convert the analog bus signal on
pins CANH and CANL into digital data, available for output on pin RXD. As in Normal
mode, the bus pins are biased at 0.5VCC and pin INH remains active.
TJA1043_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 30 March 2010
© NXP B.V. 2010. All rights reserved.
6 of 26

6 Page









TJA1043 pdf, datenblatt
NXP Semiconductors
www.DataSheet4U.com
TJA1043
High-speed CAN transceiver
7. Limiting values
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VBAT
battery supply voltage no time limit
load dump
Vx voltage on pin x
no time limit; DC value
0 < VCC < 5.5 V
on pins CANH, CANL and SPLIT
no time limit; DC value
on pins INH and WAKE
on pins VCC, VIO, TXD, RXD,
STB_N, EN, ERR_N
IWAKE
Vtrt
VESD
current on pin WAKE DC value
transient voltage
electrostatic discharge
voltage
on pins CANH, CANL, SPLIT
and VBAT
IEC 61000-4-2
at pins CANH and CANL
HBM
at pins CANH and CANL
at any other pin
MM
at any pin
CDM
at corner pins
at any pin
Tvj virtual junction
temperature
Tstg storage temperature
Min Max
0.3 +58
- 58
Unit
V
V
58 +58 V
0.3 +58
0.3 +7
V
V
- 15 mA
[1] 200 +200 V
[2]
[3] 8
[4]
+8
kV
8
4
[5]
+8
+4
kV
kV
300 +300 V
[6]
750 +750
500 +500
[7] 40 +150
V
V
°C
55 +150 °C
[1] Verified by an external test house to ensure pins CANH, CANL, SPLIT and VBAT can withstand ISO 7637
part 3 automotive transient test pulses 1, 2a, 3a and 3b.
[2] IEC 61000-4-2 (150 pF, 330 Ω); direct coupling.
[3] ESD performance of pins CANH and CANL according to IEC 61000-4-2 (150 pF, 330 Ω) has been verified
by an external test house. The result is equal to or better than ±8 kV (unaided).
[4] Human Body Model (HBM): according to AEC-Q100-002 (100 pF, 1.5 kΩ).
[5] Machine Model (MM): according to AEC-Q100-003 (200 pF, 0.75 μH, 10 Ω).
[6] Charged Device Model (CDM): according to AEC-Q100-011 (field Induced charge; 4 pF); grade C3B.
[7] In accordance with IEC 60747-1. An alternative definition of virtual junction temperature is:
Tvj = Tamb + P × Rth(vj-a), where Rth(vj-a) is a fixed value to be used for the calculation of Tvj. The rating for Tvj
limits the allowable combinations of power dissipation (P) and ambient temperature (Tamb).
TJA1043_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 30 March 2010
© NXP B.V. 2010. All rights reserved.
12 of 26

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