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PBSS5330PA Schematic ( PDF Datasheet ) - NXP Semiconductors

Teilenummer PBSS5330PA
Beschreibung 3A PNP low VCEsat (BISS) transistor
Hersteller NXP Semiconductors
Logo NXP Semiconductors Logo 




Gesamt 16 Seiten
PBSS5330PA Datasheet, Funktion
PBSS5330PA
30 V, 3 A PNP low VCEsat (BISS) transistor
7 April 2015
Product data sheet
1. General description
PNP low VCEsat Breakthrough In Small Signal (BISS) transistor, encapsulated in an
ultra thin SOT1061 leadless small Surface-Mounted Device (SMD) plastic package with
medium power capability.
NPN complement: PBSS4330PA.
2. Features and benefits
Low collector-emitter saturation voltage VCEsat
High collector current capability IC and ICM
Smaller required Printed-Circuit Board (PCB) area than for conventional transistors
Exposed heat sink for excellent thermal and electrical conductivity
Leadless small SMD plastic package with medium power capability
3. Applications
Loadswitch
Battery-driven devices
Power management
Charging circuits
Power switches (e.g. motors, fans)
4. Quick reference data
Table 1.
Symbol
VCEO
IC
ICM
RCEsat
Quick reference data
Parameter
Conditions
collector-emitter
voltage
open base
collector current
peak collector current single pulse; tp ≤ 1 ms
collector-emitter
saturation resistance
IC = -3 A; IB = -300 mA; pulsed;
tp ≤ 300 µs; δ ≤ 0.02 ; Tamb = 25 °C
Min Typ Max Unit
- - -30 V
- - -3 A
- - -5 A
- 75 107 mΩ
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PBSS5330PA Datasheet, Funktion
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low VCEsat (BISS) transistor
102
Zth(j-a)
(K/W)
10
1
duty cycle = 1
0.75
0.5
0.33
0.2
0.1
0.05
0.02 0.01
0
006aab982
10- 1
10- 5
10- 4
10- 3
10- 2
Ceramic PCB, Al2O3, standard footprint
10- 1
1
10 102 103
tp (s)
Fig. 5. Transient thermal impedance from junction to ambient as a function of pulse duration; typical values
PBSS5330PA
Product data sheet
All information provided in this document is subject to legal disclaimers.
7 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved
6 / 16

6 Page









PBSS5330PA pdf, datenblatt
NXP Semiconductors
PBSS5330PA
30 V, 3 A PNP low VCEsat (BISS) transistor
12. Package outline
1.05
0.95
1.3
0.35
0.25
1
2
0.3
0.2
Dimensions in mm
3
1.6
1.4
2.1
1.9
Fig. 16. Package outline DFN2020-3 (SOT1061)
0.45
0.35
2.1
1.1 1.9
0.9
0.65
max
09-11-12
13. Soldering
2.1
1.3
0.5 (2×)
0.4 (2×)
1.05
2.3 0.6 0.55
0.5 (2×) 0.6 (2×)
0.25
1.1
1.2
0.25 0.25
0.4
0.5
solder paste = solder lands
1.6
1.7
solder resist
occupied area
Fig. 17. Reflow soldering footprint for DFN2020-3 (SOT1061)
Dimensions in mm
sot1061_fr
PBSS5330PA
Product data sheet
All information provided in this document is subject to legal disclaimers.
7 April 2015
© NXP Semiconductors N.V. 2015. All rights reserved
12 / 16

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