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PDF MT3370B Data sheet ( Hoja de datos )
| Número de pieza | MT3370B | |
| Descripción | Wide Dynamic Range DTMF Receiver | |
| Fabricantes | Zarlink Semiconductor | |
| Logotipo |  |
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MT3170B/71B, MT3270B/71B, MT3370B/71B
Wide Dynamic Range DTMF Receiver
Data Sheet
Features
• Wide dynamic range (50 dB) DTMF Receiver
• Call progress (CP) detection via cadence
indication
• 4-bit synchronous serial data output
• Software controlled guard time for MT3x70B
• Internal guard time circuitry for MT3x71B
• Powerdown option (MT317xB & MT337xB)
• 4.194304 MHz crystal or ceramic resonator
(MT337xB and MT327xB)
• External clock input (MT317xB)
• Guarantees non-detection of spurious tones
Applications
• Integrated telephone answering machine
• End-to-end signalling
• Fax Machines
August 2005
Ordering Information
MT3170/71BE
8 Pin PDIP
MT3270/71BE
8 Pin PDIP
MT3370/71BS
18 Pin SOIC
MT3370/71BN
20 Pin SSOP
MT3370/71BSR
18 Pin SOIC
MT3371BNR
20 Pin SSOP
MT3270/71BE1
8 Pin PDIP*
MT3171BE1
8 Pin PDIP*
MT3170BE1
8 Pin PDIP**
MT3370/BN1
20 Pin SSOP*
MT3370/71BS1
18 Pin SOIC*
MT3370/71BSR1
18 Pin SOIC*
*Pb Free Matte Tin
**Pb Free Tin/Silver/Copper
Tubes
Tubes
Tubes
Tubes
Tape & Reel
Tape & Reel
Tubes
Tubes
Tubes
Tubes
Tubes
Tape & Reel
-40°C to 85°C
➀
PWDN
VDD
VSS
INPUT
➁
OSC2
OSC1
(CLK)
Voltage
Bias Circuit
AGC
Anti-
alias
Filter
Dial
Tone
Filter
Oscillator
and
Clock
Circuit
To All Chip Clocks
High
Group
Filter
Low
Group
Filter
Steering
Circuit
Digital
Detector
Algorithm
Code
Converter
and
Latch
Energy
Detection
➀ MT3170B/71B and MT337xB only.
➁ MT3270B/71B and MT337xB only.
➂ MT3x71B only.
Figure 1 - Functional Block Diagram
Digital
Guard
Time➂
Parallel to
Serial
Converter
& Latch
Mux
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 1995-2005, Zarlink Semiconductor Inc. All Rights Reserved.
ESt
or
DStD
ACK
SD
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
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MT3170B/71B, MT3270B/71B, MT3370B/71B
Data Sheet
Note:
FLOW
852
FHIGH DIGIT b3 b2 b1
1336 8 1 0 0
852 1477 9 1 0 0
941 1336 0 1 0 1
941 1209 * 1 0 1
941 1477 # 1 1 0
697 1633 A 1 1 0
770 1633 B 1 1 1
852 1633 C 1 1 1
941 1633 D 0 0 0
0= LOGIC LOW, 1= LOGIC HIGH
Table 1 - Serial Decode Bit Table
b0=LSB of decoded DTMF digit and shifted out first.
b0
0
1
0
1
0
1
0
1
0
Powerdown Mode (MT317xB/337xB)
The MT317xB/337xB devices offer a powerdown function to preserve power consumption when the device is not in
use. A logic high can be applied at the PWDN pin to place the device in powerdown mode. The ACK pin should be
kept at logic low to avoid undefined ESt/DStD and SD outputs (see Table 2).
ACK (input)
PWDN (input)
ESt/DStD (output)
SD (output)
low low
low high+
high low
high high
+ =enters powerdown mode on the rising edge.
Refer to Fig. 4 for
timing waveforms
Refer to Fig. 4 for
timing waveforms
low low
low undefined
undefined
undefined
Table 2 - Powerdown Mode
MT317xB/337xB
status
normal operation
powerdown mode
undefined
undefined
Frequency 1 (Hz)
350
425
400
480
440
480
440
480
Frequency 2 (Hz)
On/Off
Description
440 continuous
North American Dial Tones
--- continuous
European Dial Tones
--- continuous
Far East Dial Tones
620 0.5s/0.5s
North American Line Busy
--- 0.5s/0.5s
Japanese Line Busy
620 0.25s/0.25s North American Reorder Tones
480
2.0s/4.0s
North American Audible Ringing
620 0.25s/0.25s North American Reorder Tones
Table 3 - Call Progress Tones
5
Zarlink Semiconductor Inc.
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
www.DataSheet.co.kr
MT3170B/71B, MT3270B/71B, MT3370B/71B
INPUT
DTMF
Tone #n
tDP
ESt
(MT3x70B)
tREC
DStD
(MT3x71B)
tREC
tDA
tID
tDO
DTMF
Tone #n + 1
DTMF
Tone
#n + 1
Data Sheet
Input
Signal
ACK
LSB MSB
SD
LSB MSB
b0b1b2b3
b0b1b2b3
tDO - maximum allowable dropout during valid DTMF signals. (MT3x7xB).
tttttttIRRDDSSDADEEAPCC
-
-
-
-
-
-
-
minimum time between valid DTMF signals (MT3x71B).
maximum DTMF signal duration not detected as valid (MT3x7xB).
minimum DTMF signal duration required for valid recognition (MT3x71B).
time to detect the absence of valid DTMF signals (MT3x70B).
time to detect the presence of valid DTMF signals (MT3x70B).
supervisory tone integrator attack time (MT3x7xB).
supervisory tone integrator decay time (MT3x7xB).
Figure 4 - Timing Diagram
tSA tSD
Input
Signal
Envelope
ESt/DStD
VIH
ACK VIL
SD
VIH
VIL
DTMF Energy
Detect
1/fACK
tPAD
b0 b1 b2
LSB
Figure 5 - ACK to SD Timing
tDH
b3
MSB
DTMF Energy
Detect
11
Zarlink Semiconductor Inc.
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet MT3370B.PDF ] | |
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