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PDF HT0610 Data sheet ( Hoja de datos )
| Número de pieza | HT0610 | |
| Descripción | 33 x 120 LCD Driver | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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HT0610
33´120 LCD Driverwww.DataSheet4U.com
Features
· Operating voltage: 2.4V~3.5V
· 33 common/120 segment LCD driver output
· 33´120=3960 bits capacity of built-in graphic display
data RAM (BGDRAM)
· Master and slave mode available for multi-chip
operation
· 8-bit Parallel interface with general MCU
· On-chip oscillator circuit for display clock, external
clock can also be used
· Selectable multiplex ratio: 1/16, 1/32, 1/33
· Selectable bias ratio: 1/5 or 1/7
· External driving circuit for external bias supply
· On-chip selectable voltage doublers and tripler
· Wide range of operating temperature: -30°C to 85°C
· S/W controlled electronic contrast control function
(16 levels)
· External contrast control
· Low power icon mode driven by com32
· Four static icon driver circuit
· High accuracy voltage regulator with temperature co-
efficient (0.00%, -0.18%, -0.22%, -0.35%)
· Low power consumption
- Read/write mode 170mA (Typical)
- Display mode 160mA (Typical)
- Standby mode 15mA (Typical; Display off; internal
oscillator enable)
- Standby mode < 1mA (Typical; Display off; external
oscillator enable)
· CMOS process
· TCP available
General Description
The HT0610 is a driver and controller LSI for graphic
dot-matrix liquid crystal display systems. It has 33 com-
mon and 120 segment driver circuits. This chip is con-
nected directly to an MCU, accepts 8-bit parallel display
data and stores an on-chip graphic display data RAM
(BGDRAM) of 33´120 bits. It provides a high-flexible
display section due to the one-to-one correspondence
between BGDRAM bits and LCD panel pixels. It per-
forms BGDRAM read/write operation with no externally
operating clock to minimize power consumption. In ad-
dition, because it contains power supply circuits neces-
sary to drive an LCD, it is possible to make a display
system with minimal components.
Rev. 1.00
1 February 24, 2004
1 page  
HT0610
Pin Description
www.DataSheet4U.com
Pin Name I/O
Description
VDD
I
VDD is the positive supply to the digital control circuit and other circuitry in LCD bias voltage
generator (Must have same voltage level with VDDA)
RES
I Active low reset pin; reset all internal status of circuit (Same as power on reset)
VSS
I VSS is ground
DCOM
I
If pull this pin ²High² then D0~D7 bi-direction bus is used for data transferring; If DCOM pin is
²Low² then D0~D7 bi-direction bus is used for command transferring.
If pull this pin high: Indicate we want to read the display data RAM or the internal state. If we
RW I force this to Low: Indicate we want to write data to display data RAM or write some internal
state to registers.
CS
I
This pin is normal low clock input. Data on D0~D7 bi-direction data bus are latched at the fall-
ing edge of CS
D0~D7
B Those bi-direction pins are used for DATA or command transferring.
CE I High input to this pin to enable the control pins on the driver.
OSC1
Oscillator input pin.
I
For internal oscillator mode, this is an input for the internal low power RC oscillator circuit. In
this mode, an external resistor of certain value is placed between the OSC1 and OSC2 pins.
For external oscillator mode, OSC1 pin should be left open
OSC2
Oscillator output pin
For internal oscillator mode, this is an output for the internal low power RC oscillator circuit.
O External Oscillator input
For external oscillator mode, OSC2 will be an input pin for external clock and no external resis-
tor is needed.
C1P, C1N
¾ If internal DC/DC converter is enabled, a capacitor is required to connect these two pins.
C2P, C2N
¾
If internal tripler is enabled, a capacitor is required to connect these two pins. Otherwise, leave
these pin open.
VLL2~VLL6
Group of voltage level pins for driving the LCD panel. They can either be connected to external
O driving circuit for external bias supply or connected internally to built-in divider circuit. For in-
ternal voltage divider enable, a 0.1mF capacitor to VSS is required on each pin.
DUM1, DUM2
O
If internal voltage divider is enable with 1/7 bias selected, a capacitor to VSS is required on
each pin. Otherwise, pull these two pin to VSS
C+, C-
¾ If internal divider circuit is enable, a capacitor is required to connect between these two pin
VCCA1
O If internal DC/DC Converter is enabled, a 0.1mF capacitor from this pin to VSS is required. It
can also be an external bias input pin if internal DC/DC converter is not used
VF, VR
This is a feedback path for the gain control (external contrast control) of VLL1 to VLL6. For ad-
¾
justing the LCD driving voltage, it requires a feedback resistor placed between VR and VF, a
gain control resistor placed between VF and VSS, a 10uF capacitor placed between VR and
VSS.
COM0~COM32 O These pins provide the row driving signal to LCD panel
VDDA
I
VDDA is the positive supply to the noise sensitive circuitry and must have same voltage level
with VDD
ICON1~ICON4 O There are four independent annunciator driving outputs
IBP O This pin combines with ICON1~ICON4 pins to form annunciator driving part.
SEG0~SEG119 O These 120 pins provide LCD column driving signal to LCD panel.
Rev. 1.00
5 February 24, 2004
5 Page 
Parallel timing characteristics (Read cycle)
Symbol
tCYCLE
tEH
tAS
tDS
tDH
tAH
Parameter
Enable Cycle Time
Enable Pulse Width
Address Setup Time
Data Setup Time
Data Hold Time
Address Hold Time
HT0610
Ta=30°C~85°C, DVDD=2.4V~w3.w5Vw,.VDSaSt=a0SVheet4U.com
Min.
Typ.
Max.
Unit
620 ¾ ¾ ns
300 ¾ ¾ ns
10 ¾ ¾ ns
¾ ¾ 300 ns
10 ¾ ¾ ns
30 ¾ ¾ ns
CE
C S (C L K )
RW
DCOM
D 0~D 7
tC Y C L E
tE H
tA S
tD S
tA H
tD H
V a lid D a ta
Timing characteristics (Read cycle)
Rev. 1.00
11 February 24, 2004
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet HT0610.PDF ] | |
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