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PDF K6F1616R6C Data sheet ( Hoja de datos )

Número de pieza K6F1616R6C
Descripción 1M x16 bit Super Low Power and Low Voltage Full CMOS Static RAM
Fabricantes Samsung semiconductor 
Logotipo Samsung semiconductor Logotipo



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No Preview Available ! K6F1616R6C Hoja de datos, Descripción, Manual

K6F1616R6C Family
CMwwOwS.DaStaSRheAet4MU.com
Document Title
1M x16 bit Super Low Power and Low Voltage Full CMOS Static RAM
Revision History
Revision No. History
0.0 Initial draft
0.1 Revised
- Changed ball name of E3 (Vss) & H6 (DNU) to NC.
- Deleted 85ns Speed bin.
1.0 Finalize
- Deleted 55ns Speed bin.
Draft Date
Remark
November 17, 2003 Preliminary
November 21, 2003 Preliminary
May 24, 2004
Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 1.0
May 2004

1 page




K6F1616R6C pdf
K6F1616R6C Family
AC OPERATING CONDITIONS
TEST CONDITIONS(Test Load and Input/Output Reference)
Input pulse level: 0.2 to Vcc-0.2V
Input rising and falling time: 5ns
Input and output reference voltage: 0.9V
Output load(see right): CL=100pF+1TTL
CL=30pF+1TTL
AC CHARACTERISTICS (Vcc=1.65~1.95V, TA=-40 to 85°C)
Parameter List
Symbol
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
LB, UB valid to data output
Chip select to low-Z output
Output enable to low-Z output
LB, UB enable to low-Z output
Output hold from address change
Chip disable to high-Z output
OE disable to high-Z output
UB, LB disable to high-Z output
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
LB, UB valid to end of write
tRC
tAA
tCO1, tCO2
tOE
tBA
tLZ1, tLZ2
tOLZ
tBLZ
tOH
tHZ1, tHZ2
tOHZ
tBHZ
tWC
tCW1, tCW2
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
tBW
CMwwOwS.DaStaSRheAet4MU.com
VTM3)
R12)
CL1)
R22)
1. Including scope and jig capacitance
2. R1=3070, R2=3150
3. VTM =1.8V
Speed Bin
70ns
Min Max
70 -
- 70
- 70
- 35
- 70
10 -
5-
10 -
10 -
0 25
0 25
0 25
70 -
60 -
0-
60 -
50 -
0-
0 20
30 -
0-
5-
60 -
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Symbol
Test Condition
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
VDR
IDR
tSDR
tRDR
CS1Vcc-0.2V1), VIN0V
Vcc=1.2V, CS1Vcc-0.2V1), VIN0V
See data retention waveform
1. 1) CS1Vcc-0.2V, CS2Vcc-0.2V(CS1 controlled) or
2) 0CS20.2V(CS2 controlled)
2. Typical values are measured at TA=25°C and not 100% tested.
Min
1.0
-
0
tRC
Typ2)
-
1.0
-
-
Max
1.95
12
-
-
Unit
V
µA
ns
5 Revision 1.0
May 2004

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