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LC863248 Schematic ( PDF Datasheet ) - Sanyo Semicon Device
| Teilenummer | LC863248 |
|
| Beschreibung | 8-Bit Single Chip Microcontroller | |
| Hersteller | Sanyo Semicon Device | |
| Logo |  |
|
Gesamt 20 Seiten 
Ordering number : ENN*6694
CMOS IC
LC863264/56/48/40A
8-Bit Single Chip Microcontroller
Preliminary
Overview
The LC863264/56/48/40A are 8-bit single chip microcontrollers with the following on-chip functional blocks:
- CPU : Operable at a minimum bus cycle time of 0.424µs
- On-chip ROM capacity
Program ROM : 64K/56K/48K/40K bytes
CGROM : 16K bytes
- On-chip RAM capacity : 640 bytes
- OSD RAM : 352 × 9 bits
- Closed-Caption TV controller and the on-screen display controller
- Closed-Caption data slicer
- Four channels × 8-bit AD Converter
- Three channels × 7-bit PWM
- Two 16-bit timer/counters, 14-bit base timer
- 8-bit synchronous serial interface circuit
- IIC-bus compliant serial interface circuit (Multi-master type)
- ROM correction function
- 16-source 10-vectored interrupt system
- Integrated system clock generator and display clock generator
Only one X’tal oscillator (32.768kHz) for PLL reference is used for both generators
TV control and the Closed Caption function
All of the above functions are fabricated on a single chip.
Ver.0.91
51299
91400 RM (IM) HS No.6694-1/20
 
Pin Assignment
• DIP42S
P10/SO0
P11/SI0
P12/SCK0
P13/PWM1
P14/PWM2
P15/PWM3
P16
P17/PWM
VSS
XT1
XT2
VDD
P84/AN4
P85/AN5
P86/AN6
P87/AN7
RES
FILT
CVIN
VS
HS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
• QIP48E
P15/PWM3
P16
P17/PWM
VSS
XT1
XT2
VDD
NC
P84/AN4
P85/AN5
P86/AN6
P87/AN7
1
2
3
4
5
6
7
8
9
10
11
12
LC863264/56/48/40A
42 P07
41 P06
40 P05
39 P04
38 P03
37 P02
Package Dimension
(unit : mm)
3025B
36 P01
35 P00
34 P73/INT3/T0IN
33 P72/INT2/T0IN
32 P71/INT1
31 P70/INT0
30 P63/SCLK1
29 P62/SDA1
28 P61/SCLK0
27 P60/SDA0
26 I
25 BL
24 B
23 G
22 R
SANYO : DIP-42S(600mil)
Package Dimension
(unit : mm)
3156
36 P02
35 P01
34 P00
33 NC
32 P73/INT3/T0IN
31 P72/INT2/T0IN
30 P71/INT1
29 P70/INT0
28 P63/SCLK1
27 P62/SDA1
26 P61/SCLK0
25 P60/SDA0
SANYO : QIP-48E
No.6694-6/20
6 Page 
LC863264/56/48/40A
4. Serial Input/Output Characteristics at Ta=-10°C to +70°C, VSS=0V
Parameter
Cycle
Low Level
pulse width
High Level
pulse width
Cycle
Low Level
pulse width
High Level
pulse width
Data set up time
Data hold time
Symbol
Pins
Conditions
tCKCY(1)
tCKL(1)
•SCK0
•SCLK0
Refer to figure 4.
Ratings
unit
VDD[V] min. typ. max.
4.5 - 5.5 2
tCYC
1
tCKH(1)
1
tCKCY(2)
tCKL(2)
•SCK0
•SCLK0
tCKH(2)
•Use pull-up
resistor (1kΩ)
when Nch open-
drain output.
•Refer to figure 4.
4.5 - 5.5
2
1/2tCKCY
1/2tCKCY
tICK SI0
tCKI
•Data set-up to
SCK0.
•Data hold from
SCK0.
•Refer to figure 4.
4.5 - 5.5 0.1
0.1
µs
Output delay time
(Using external
clock)
Output delay time
(Using internal
clock)
tCKO(1)
tCKO(2)
SO0
SO0
•Data hold from
SCK0.
•Use pull-up
resistor (1kΩ)
when Nch open-
drain output.
•Refer to figure 4.
4.5 - 5.5
4.5 - 5.5
7/12tCYC
+0.2
1/3tCYC
+0.2
5. IIC Input/Output Conditions at Ta=-10°C to +70°C, VSS=0V
Parameter
Symbol
Standard
min. max.
SCL Frequency
fSCL
0 100
BUS free time between stop - start
tBUF 4.7 -
HOLD time of start, restart condition
tHD;STA
4.0
-
L time of SCL
tLOW 4.7 -
H time of SCL
tHIGH 4.0 -
Set-up time of restart condition
tSU;STA
4.7
-
HOLD time of SDA
tHD;DAT
0
-
Set-up time of SDA
tSU;DAT
250
-
Rising time of SDA, SCL
tR - 1000
Falling time of SDA, SCL
tF - 300
Set-up time of stop condition
tSU;STO
4.0
Refer to figure 10
(Note) Cb : Total capacitance of all BUS (unit : pF)
-
High speed
min. max.
0 400
1.3 -
0.6 -
1.3 -
0.6 -
0.6 -
0 0.9
100 -
20+0.1Cb 300
20+0.1Cb 300
0.6 -
unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
ns
µs
No.6694-12/20
12 Page | ||
| Seiten | Gesamt 20 Seiten | |
| PDF Download | [ LC863248 Schematic.PDF ] | |
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