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ADF7011 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADF7011
Beschreibung High Performance ISM Band ASK/FSK/GFSK Transmitter IC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 24 Seiten
ADF7011 Datasheet, Funktion
High Performance ISM Bandwww.DataSheet4U.com
ASK/FSK/GFSK Transmitter IC
ADF7011
FEATURES
Single Chip Low Power UHF Transmitter
Frequency Band
433 MHz to 435 MHz
868 MHz to 870 MHz
On-Chip VCO and Fractional-N PLL
2.3 V to 3.6 V Supply Voltage
Programmable Output Power
–16 dBm to +12 dBm, 0.3 dB Steps
Data Rates up to 76.8 kbps
Low Current Consumption
29 mA at +10 dBm at 433.92 MHz
Power-Down Mode (<1 A)
24-Lead TSSOP Package Hooks to External VCO for
< 1.4 GHz Operation
APPLICATIONS
Low Cost Wireless Data Transfer
Wireless Metering
Remote Control/Security Systems
Keyless Entry
GENERAL DESCRIPTION
The ADF7011 is a low power OOK/ASK/FSK/GFSK UHF
transmitter designed for use in ISM band systems. It contains
and integrated VCO and Σ-fractional-N PLL. The output
power, channel spacing, and output frequency are program-
mable with four 24-bit registers. The fractional-N PLL enables
the user to select any channel frequency within the European
433 MHz and 868 MHz bands, allowing the use of the ADF7011
in frequency hopping systems. The fractional-N also allows the
transmitter to operate in the less congested sub-bands of the
868 MHz to 870 MHz SRD band.
It is possible to choose from the four different modulation
schemes: Binary or Gaussian Frequency Shift Keying (FSK/
GFSK), Amplitude Shift Keying (ASK), or On/Off Keying
(OOK). The device also features a crystal compensation register
that can provide ± 1 ppm resolution in the output frequency.
Indirect temperature compensation of the crystal can be accom-
plished inexpensively using this register.
Control of the four on-chip registers is via a simple 3-wire inter-
face. The devices operate with a power supply ranging from
2.3 V to 3.6 V and can be powered down when not in use.
FUNCTIONAL BLOCK DIAGRAM
CREG
OSC1
OSC2
، CLK
CLKOUT CPVDD CPGND
CPOUT
VCOIN
CVCO
VCOGND
OOK/ASK
VDD
DVDD
DGND
TxCLK
TxDATA
LE
DATA
CLK
REV. 0
، R PFD/
CHARGE
PUMP
OOK/ASK
FSK/GFSK
، FRACTIONAL-N
SIGMA-DELTA
SERIAL
INTERFACE
FREQUENCY
COMPENSATION
CENTER
FREQUENCY
CE
ADF7011
AGND
VCO
RFOUT
PA
RFGND
LDO
REGULATOR
CREG
LOCK DETECT
MUXOUT
MUXOUT
RSET
TEST
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.






ADF7011 Datasheet, Funktion
ADF7011
Pin No. Mnemonic
15 OSC1
16 VCOGND
17 TEST
18 DVDD
19 RFGND
20 RFOUT
21 AGND
22 VCOIN
23 CVCO
24 CREG
PIN FUNCTION DESCRIPTIONS (continued)
www.DataSheet4U.com
Function
Oscillator Pin. For use with crystal reference only. This is three-stated when an external reference oscilla-
tor is used.
Voltage Controlled Oscillator Ground.
Input to the RF Fractional-N Divider. This pin allows the user to connect an external VCO to the part.
Disabling the internal VCO activates this pin. If the internal VCO is used, this pin should be grounded.
Positive Supply for the Digital Circuitry. This must be between 2.3 V and 3.6 V. Decoupling capacitors
to the analog ground plane should be placed as close as possible to this pin.
Ground for Output Stage of Transmitter.
The modulated signal is available at this pin. Output power levels are from –16 dBm to +12 dBm. The
output should be impedance matched to the desired load using suitable components. See the RF Output
Stage section.
Ground Pin for the RF Analog Circuitry.
The tuning voltage on this pin determines the output frequency of the Voltage Controlled Oscillator
(VCO). The higher the tuning voltage, the higher the output frequency.
A 0.22 µF capacitor should be added to reduce noise on VCO bias lines. Tied to the CREG pin.
A 2.2 µF capacitor should be added at CREG, tied to GND, to reduce regulator noise and improve
stability. A reduced capacitor will improve regulator power-on time but may cause higher spurious
components.
–6– REV. 0

6 Page









ADF7011 pdf, datenblatt
ADF7011
Modulation Register
www.DataSheet4U.com
INDEX
COUNTER
GFSK MOD
CONTROL
MODULATION DEVIATION
POWER AMPLIFIER
MODULATION CONTROL
SCHEME
BITS
DB23 DB22 DB21 DB20 DB19 DB18 DB17 DB16 DB15 DB14 DB13 DB12 DB11 DB10 DB9 DB8 DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
P1 IC2 IC1 MC3 MC2 MC1 D7 D6 D5 D4 D3 D2 D1 P7 P6 P5 P4 P3 P2 P1 S2 S1 C2 (1) C1 (0)
S2
S1
MODULATION
SCHEME
0 0 FSK
0 1 GFSK
1 0 ASK
1 1 OOK
IF AMPLITUDE SHIFT KEYING SELECTED, TxDATA = 0
POWER AMPLIFIER OUTPUT LEVEL
D7 D6 . D2
D1
P7 P6 . P2 P1
0 0 .X
0 1 .0
0 1 .0
. . ..
0 1 .1
1 0 .0
1 0 .0
. . ..
1 0 .1
1 1 .0
1 1 .0
P1 RF PRESCALER
1
1
..
0 4/5
1 1 .1
1 8/9
X PA OFF
0 ؊16.0dBm
1 ؊16؉1؋(10/32)
..
1 ؊16؉31؋(10/32)
0 ؊6dBm
1 ؊6؉1؋(10/32)
..
1 ؊6؉1؋(10/32)
0 2dBm
1 2؉1؋(10/32)
..
1 12dBm
0
0
0
.
0
1
1
.
1
1
1
1
1
0.
1.
1.
..
1.
0.
0.
..
0.
1.
1.
1.
1.
X
0
0
.
1
0
0
.
1
0
0
.
1
X PA OFF
0 ؊16.0dBm
1 ؊16؉1؋(10/32)
..
1 ؊16؉31؋(10/32)
0 ؊6dBm
1 ؊6؉1؋(10/32)
..
1 ؊6؉1؋(10/32)
0 2dBm
1 2؉1؋(10/32)
..
1 12dBm
IF FREQUENCY SHIFT KEYING SELECTED
D7. . . . D3
D2 D1 F DEVIATION
0. . . .
0. . . .
0. . . .
0. . . .
.
1. . . .
0
0
0
0
.
1
0 0 PLL MODE
0 1 1 ؋ FSTEP
1 0 2 ؋ FSTEP
1 1 3 ؋ FSTEP
. . ...............
1 1 127 ؋ FSTEP
FSTEP = FPFD/212
IC2
0
0
1
1
MC3
0
0
.
1
IC1
0
1
0
1
MC2
0
0
.
1
IF GAUSSIAN FREQUENCY SHIFT KEYING SELECTED
INDEX
COUNTER
16
32
64
128
D7 D3
00
00
00
00
..
11
D2
0
0
1
1
.
1
MC1
0
1
.
1
GFSK MOD
CONTROL
0
1
.
7
D1 DIVIDER FACTOR
00
11
02
13
. ......
1 127
–12–
REV. 0

12 Page





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