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LC78833V Schematic ( PDF Datasheet ) - Sanyo Semicon Device

Teilenummer LC78833V
Beschreibung Digital Audio 16-Bit D/A Converter with Built-In Digital Filters
Hersteller Sanyo Semicon Device
Logo Sanyo Semicon Device Logo 




Gesamt 11 Seiten
LC78833V Datasheet, Funktion
Ordering number : EN*5212
Preliminary
CMOS LSI
LC78833M, 78833V
Digital Audio 16-Bit D/A Converter
with Built-In Digital Filters
Overview
The LC78833M and LC78833V are CMOS 16-bit D/A
converters with built-in 4× oversampling digital filters.
Functions and Features
[Digital Filter Block]
• 4× oversampling filters: Two FIR filter stages (33rd and
ninth order)
• De-emphasis filter: Supports a 44.1 kHz sampling
frequency (fs).
[D/A Converter Block]
• Dynamic level shifting conversion 16-bit D/A converter
• D/A converters for two channels (synchronized outputs)
on a single chip
• On-chip output operational amplifiers
• System clock: 384fs
• 5-V single-voltage power supply
• Supports low-voltage operation (3.0 V)
• Implemented in a Si gate CMOS process for low power.
Package Dimensions
unit: mm
3036B-MFP20
[LC78833M]
unit: mm
3175A-SSOP24
[LC78833V]
SANYO: MFP20
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Maximum supply voltage
Maximum input voltage
Maximum output voltage
Operating temperature
Storage temperature
Symbol
VDD max
VIN max
VOUT max
Topr
Tstg
Conditions
SANYO: SSOP24
Ratings
–0.3 to +7.0
–0.3 to VDD + 0.3
–0.3 to VDD + 0.3
–30 to +75
–40 to +125
Unit
V
V
V
°C
°C
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
D3095HA (OT) No. 5212-1/11






LC78833V Datasheet, Funktion
LC78833M, 78833V
LC78833M/V Operation
1. Digital Filters
The LC78833M and LC78833V perform the computations shown in the figure.
• Oversampling
The oversampling circuit in these ICs consists of two 2× interpolation filters (implemented as FIR filters)
connected vertically.
In particular, these ICs implement 4× oversampling by the vertical connection of two FIR filter stages, a 33rd-order
stage and a ninth-order stage. See page 9 for the filter characteristics.
• De-emphasis
A first-order IIR filter is used for de-emphasis. The filter coefficients are optimized for a sampling frequency of
44.1 kHz. See page 9 for the filter characteristics when de-emphasis is applied.
— De-emphasis on/off switching
De-emphasis is on when the EMP pin is high.
De-emphasis is off when the EMP pin is low.
2. Digital Audio Data Input
These ICs handle digital audio data in a 16-bit two’s complement MSB first format. The 16-bit serial data is input to
an internal register from the DATA pin on BCLK rising edges and read in on rising and falling edges of the LRCK
signal.
No. 5212-6/11

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