AD5066 Datasheet PDF - Analog Devices
| Part Number | AD5066 | |
| Description | Fully Accurate 16-Bit UnBuffered VOUT DAC SPI Interface 2.7 V to 5.5 V | |
| Manufacturers | Analog Devices | |
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Preliminary Technical Data
Fully Accurate 16-Bit UnBuffwewrwe.DdatVaSOhUeTetD4UA.cComSPI
Interface 2.7 V to 5.5 V in a TSSOP
AD5066
FEATURES
Low power Quad 16 bit DAC, ± 1LSB INL
Individual reference pins
2.7 V to 5.5 V power supply
Unbuffered voltage output capable of driving 60KΩ
Fast Settling time of 4 us typically
Power-on reset to zero scale or mid-scale
Per channel power-down
3 power-down functions
Low glitch on power up
Hardware LDAC with LDAC override function
CLR Function to programmable code
Small 16 lead TSSOP
APPLICATIONS
Process control
Data acquisition systems
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5066 is a low power, 16-bit quad-channel, unbuffered
voltage-out DAC offering relative accuracy specs of 1LSB INL
with individual reference pin and can operate from a single
2.7V to 5.5V. The AD5066 parts also offer a differential
accuracy specification of ±1 LSB. Reference buffers are also
provided on-chip. The parts use a versatile 3-wire, low power
Schmitt trigger serial interface that operates at clock rates up to
50 MHz and is compatible with standard SPI®, QSPI™,
MICROWIRE™, and DSP interface standards. The AD5066
incorporates a power-on reset circuit that ensures the DAC
output powers up zero scale or midscale and remains there until
a valid write takes place to the device. The AD5066 contain a
power-down feature that reduces the current consumption of
the device to typically 330 nA at 5 V and provides software
selectable output loads while in power-down mode. The part
can be placed into power-down mode over the serial interface.
Total unadjusted error for the part is <0.8 mV. Both parts
exhibit very low glitch on power-up.
FUNCTIONAL BLOCK DIAGRAMS
Figure 1.AD5066
Table 1. Related Devices
Part No.
Description
AD5666
Quad,16-bit buffered D/A,16 LSB INL, TSSOP
AD5065/45/25 Quad,16-bit buffered D/A,1 LSB INL, TSSOP
AD5064/44/24 Quad 16-bit nanoDAC, 1 LSB INL, TSSOP
AD5063/62
16-bit nanoDAC, 1 LSB INL, MSOP
AD5061
16-/14bit nanoDAC, 4 LSB INL, SOT-23
AD5060/40
16-/14bit nanoDAC, 1 LSB INL, SOT-23
The outputs of all DACs can be updated simultaneously using
the LDAC function, with the added functionality of user-select-
able DAC channels to simultaneously update. There is also an
asynchronous CLR that clears all DACs to a software-selectable
code - 0 V, midscale, or full scale.
PRODUCT HIGHLIGHTS
1. Quad channel available in 16-lead TSSOP package.
2. Individual voltage reference pins
3. 16 bit accurate, 1 LSB INL.
4. Low glitch on power-up.
5. High speed serial interface with clock speeds up to 50 MHz.
6. Three power-down modes available to the user.
7. Reset to known output voltage (zero scale).
Rev. PrB
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
© 2007 Analog Devices, Inc. All rights reserved.
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Preliminary Technical Data
AD5066www.DataSheet4U.com
AC CHARACTERISTICS
VDD = 2.7 V to 5.5 V, RL = 2 kΩ to GND, CL = 200 pF to GND, VREFIN = 4.096 unless otherwise specified. All specifications TMIN to TMAX,
unless otherwise noted.
Table 3.
Parameter1, 2
Output Voltage Settling Time
Min Typ
5
Output Voltage Settling Time
14
Slew Rate
Digital-to-Analog Glitch Impulse
Reference Feedthrough
Digital Feedthrough
Digital Crosstalk
Analog Crosstalk
DAC-to-DAC Crosstalk
AC Crosstalk
AC PSRR
Multiplying Bandwidth
Total Harmonic Distortion
Output Noise Spectral Density
Output Noise
1.5
4
−90
0.1
0.5
6
6.5
6
TBD
340
−80
64
60
6
Max Unit
μs
μs
V/μs
nV-s
dB
nV-s
nV-s
nV-s
nV-s
nV-s
Conditions/Comments3
¼ to ¾ scale settling to ±1 LSB,RL = 5kΩ single channel update
including DAC calibration sequence
¼ to ¾ scale settling to ±1 LSB,RL = 5kΩ all channel update including
DAC calibration sequence
1 LSB change around major carry
VREF = 2 V ± 0.1 V p-p, frequency = 10 Hz to 20 MHz
kHz
dB
nV/√Hz
nV/√Hz
μV p-p
VREF = 2 V ± 0.2 V p-p
VREF = 2 V ± 0.1 V p-p, frequency = 10 kHz
DAC code = 0x8400, 1 kHz
DAC code = 0x8400, 10 kHz
0.1 Hz to 10 Hz
1 Guaranteed by design and characterization; not production tested.
2 See the Terminology section.
3 Temperature range is −40°C to + 105°C, typical at 25°C.
Rev. PrB | Page 5 of 20
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