|
|
PDF MB86291A Data sheet ( Hoja de datos )
| Número de pieza | MB86291A | |
| Descripción | Graphics Display Controller | |
| Fabricantes | Fujitsu Media Devices Limited | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de MB86291A (archivo pdf) en la parte inferior de esta página. Total 25 Páginas | ||
|
No Preview Available !
FUJITSU SEMICONDUCTOR
DATA SHEET
ASSP for Graphics Control
DS04-31102-1E
www.DataSheet4U.com
Graphics Display Controller
MB86291A
s DESCRIPTION
The MB86291A is an evolved version of the Fujitsu MB86290A graphics controller designed for use in a car
navigation system or amusement equipment. The MB86291A is a graphics display controller with a geometry
processor, digital video capture facility, and on-chip SDRAM.
Embedding SDRAM implements data transfer at a higher bandwidth, resulting in faster drawing. Integrating the
geometry processor reduces the CPU load, thereby improving the performance of the entire system.
s FEATUERS
• Operating frequency : 100 MHz (External clock of 14.32 MHz Max)
• Geometry processor: Capable of executing operations for geometric transformation and surface front/rear
evaluation.
• Memory block: Embedded 16-Mbit SDRAM
• Video capture block: Embedded facility to capture digital video images, for example, from TV, capable of easily
implementing “Picture in Picture” and video graphics superimposing.
• Host interface: Enables direct connection to various CPUs (Fujitsu SparcLite, Hitachi SH3/4 or NEC V83x) .
(Continued)
s PACKAGE
208-pin plastic QFP
(FPT-208P-M04)
1 page  
MB86291A
www.DataSheet4U.com
• Host Interface Pins
Pin Name
Input/output
Function
MODE0 to MODE2
Input
Host CPU mode/Ready mode select
RESET
Input
Hardware reset
D0 to D31
Input/output Host CPU bus data
A2 to A24
Input
Host CPU bus address (Connect A[24] to MWR in V832 mode.)
BCLKI
Input
Host CPU bus clock
BS
Input
Bus cycle start signal
CS
Input
Chip select signal
RD
Input
Read strobe signal
WE0
Input
D0 to D7 write strobe signal
WE1
Input
D8 to D15 write strobe signal
WE2
Input
D16 to D23 write strobe signal
WE3
Input
D24 to D31 write strobe signal
RDY
Output
Tristate
Wait request signal
(“0” for wait state with SH3; “1” for wait state with SH4, V832, or SPARClite)
DREQ
Output DMA request signal (active low with both SH and V832)
DRACK/DMAAK
Input
DMA request acknowledge signal (Connect this to DMAAK in V832 mode.
Active high with both SH and V832.)
DTACK/TC
Input
DMA transfer strobe signal (Connect this to TC in V832 mode. SH = active
high, V832 = active low)
INT Output Host CPU interrupt signal (SH = active low, V832 = active high)
TEST0, TEST1,
TESTH0 to TESTH5
Input
Test signal
Note : The host interface can connect the MB86291A to the SH4 (SH7750) or SH3 (SH7709) from Hitachi Ltd.
the V832 from NEC, or to the SPARClite (MB86833) from Fujitsu without any external circuit in between.
(Using the SRAM interface allows the MB86291A to use another CPU.) The host CPU is set by the
MODE0 and MODE1 pins as shown below.
MODE1 pin
MODE0 pin
CPU Type
L L SH3
L H SH4
H L V832
H H SPARClite
Note : The MODE2 pin can be used to set the Ready signal level to be used upon completion of the bus cycle. To
use the MODE2 signal at "H" level, set the software setting to two cycles.
MODE2 pin
Ready signal mode
L Set RDY signal to "Not Ready" level upon completion of bus cycle.
H Set RDY signal to "Ready" level upon completion of bus cycle.
5
5 Page 
MB86291A
www.DataSheet4U.com
s ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Rating
Min Max
Unit
Power supply voltage
Input voltage
Output current
Power pin current
Ambient operating temperature
Ambient storage temperature
VDDL*1
VDDH
VI
IO
IPOW
TA
Tstg
− 0.5
− 0.5
− 0.5
− 13
0
− 30*2
− 55
+ 3.0
+ 4.0
VDDH + 0.5 (< 4.0)
+ 13
60
+ 70
+ 85*2
+ 125
V
V
mA
mA
°C
°C
*1 : The analog and PLL power supplies are included.
*2 : Model supporting a wider range of temperatures
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
s RECOMMENDED OPERATING CONDITION
Parameter
Symbol
Power supply voltage
VDDL*1
VDDH
Input voltage (High level)
VIH
Input voltage (Low level)
VIL
VREF pin input voltage
VREF
VRO pin external resistor
RVRO
AOUT pin external resistor*2
RAOUT
ACOMP pin external capacitor*3
CACOMP
Ambient operating temperature
TA
*1 : The analog and PLL power supplies are included.
*2 : AOUTR, AOUTG and AOUTB pins
*3 : ACOMPR, ACOMPG, and ACOMPB pins
Min
2.3
3.0
2.0
− 0.3
1.05
− 40
Value
Typ
2.5
3.3
1.10
2.7
75
0.1
Max
2.7
3.6
VDDH + 0.3
+ 0.8
1.15
+ 85
Unit
V
V
V
V
V
kΩ
Ω
µF
°C
11
11 Page | ||
| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet MB86291A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| MB86291A | Graphics Display Controller | Fujitsu Media Devices Limited |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |