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Número de pieza | PHB129NQ04LT | |
Descripción | N-channel TrenchMOS logic level FET | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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PHP/PHB129NQ04LT
N-channel TrenchMOS™ logic level FET
Rev. 01 — 11 May 2004
Product data
1. Product profile
1.1 Description
Logic level N-channel enhancement mode field-effect transistor in a plastic package
using TrenchMOS™ technology.
1.2 Features
s Logic level threshold
s Very low on-state resistance.
1.3 Applications
s Motors, lamps, solenoids
s DC-to-DC converters
s Uninterruptible power supplies
s General industrial applications.
1.4 Quick reference data
s VDS ≤ 40 V
s Ptot ≤ 200 W
s ID ≤ 75 A
s RDSon ≤ 5 mΩ.
2. Pinning information
Table 1: Pinning - SOT78 (TO-220AB) and SOT404 (D2-PAK), simplified outline and symbol
Pin Description
Simplified outline
Symbol
1 gate (g)
2 drain (d)
[1]
mb
mb
3 source (s)
mb mounting base;
connected to
drain (d)
g
mbb076
MBK106
123
SOT78 (TO-220AB)
2
1 3 MBK116
SOT404 (D2-PAK)
[1] It is not possible to make connection to pin 2 of the SOT404 package.
d
s
1 page Philips Semiconductors
PHP/PHB1w2ww9.DNataQShe0et44U.cLomT
N-channel TrenchMOS™ logic level FET
6. Characteristics
Table 5: Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Min Typ Max Unit
Static characteristics
V(BR)DSS drain-source breakdown voltage
ID = 250 µA; VGS = 0 V
Tj = 25 °C
Tj = −55 °C
40 - - V
36 - - V
VGS(th) gate-source threshold voltage
ID = 1 mA; VDS = VGS; Figure 9 and 10
Tj = 25 °C
Tj = 175 °C
Tj = −55 °C
1 1.5 2 V
0.5 - - V
- - 2.2 V
IDSS drain-source leakage current
IGSS gate-source leakage current
VDS = 40 V; VGS = 0 V
Tj = 25 °C
Tj = 175 °C
VGS = ±15 V; VDS = 0 V
- - 1 µA
- - 500 µA
- 2 100 nA
RDSon drain-source on-state resistance
VGS = 10 V; ID = 25 A; Figure 7 and 8
Tj = 25 °C
Tj = 175 °C
VGS = 5 V; ID = 25 A; Figure 7 and 8
VGS = 4.5 V; ID = 25 A
-
4.1 5
mΩ
- 7.8 9.6 mΩ
- 5.7 6.4 mΩ
- - 7.1 mΩ
Dynamic characteristics
Qg(tot) total gate charge
ID = 25 A; VDD = 32 V; VGS = 5 V; Figure 13 -
44.2 -
nC
Qgs gate-source charge
- 10.9 - nC
Qgd gate-drain (Miller) charge
- 17.4 - nC
Ciss
Coss
Crss
td(on)
tr
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Figure 11
VDD = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG = 10 Ω
- 3965 - pF
- 635 - pF
- 280 - pF
- 43 - ns
- 145 - ns
td(off)
turn-off delay time
- 132 - ns
tf fall time
- 92 - ns
Source-drain diode
VSD source-drain (diode forward) voltage IS = 25 A; VGS = 0 V; Figure 12
trr reverse recovery time
Qr recovered charge
IS = 20 A; dIS/dt = −100 A/µs;
VGS = 0 V; VR = 30 V
- 0.85 1.2 V
- 61 - ns
- 57 - nC
9397 750 13164
Product data
Rev. 01 — 11 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
5 of 13
5 Page Philips Semiconductors
8. Revision history
Table 6: Revision history
Rev Date
CPCN
Description
01 20040511 -
Product data (9397 750 13164)
PHP/PHB1w2ww9.DNataQShe0et44U.cLomT
N-channel TrenchMOS™ logic level FET
9397 750 13164
Product data
Rev. 01 — 11 May 2004
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
11 of 13
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Páginas | Total 13 Páginas | |
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PHB129NQ04LT | N-channel TrenchMOS logic level FET | NXP Semiconductors |
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