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PDF AME9003 Data sheet ( Hoja de datos )
| Número de pieza | AME9003 | |
| Descripción | CCFL Backlight Controller | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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AME, Inc.
AME9003
Preliminary
CCFL Backlight Controller
n General Description
The AME9003 is AME’ s next generation direct drive
CCFL controller. Like its cousins, the AME9001 and
AME9002, the AME9003 controller provides a cost effi-
cient means to drive single or multiple cold cathode fluo-
rescent lamps (CCFL), driving 3 external MOSFETs that,
in turn, drive a wirewound transformer that is coupled to
the CCFL.
The AME9003, like the AME9002 includes extra cir-
cuitry that allows for a special one second start up pe-
riod wherein the voltage across the CCFL is held at a
higher than normal voltage to allow older tubes (or cold
tubes) a period in which they can” warm up” . During
this one second startup period the driving frequency is
adjusted off of resonance so that the tube voltage can be
controlled. As soon as the CCFL ” strikes” the special
start up period ends and the circuit operates in its normal
mode. However the AME9003 uses an extra capacitor to
accurately set the start up interval. In addition to that the
AME9003 features a soft start AND soft finish on each
dimming cycle edge in order to minimize any audible
vibrations during the dimming function.
The AME9003 also includes features such as, dimming
control polarity selection, undervoltage lockout and fault
detection. It is designed to work with input voltages from
7V up to 24V. When disabled the circuit goes into a zero
current mode.
n Features
l Small 24 pin QSOP package
l 24 pin PDIP/SOIC also available
l Drives multiple tubes
l Special 1 second start up mode
l Automatically checks for common fault
conditions
l 7.0V < Vbatt < 24V
l Low component count
l Low Idd < 3.5mA
l <1uA shutdown mode
l Battery UV lockout
l Brightness polarity select
l Soft-start, soft-finish dimming
n Pin Configuration
24 23 22 21 20 19 18 17 16 15 14 13
AME9003
1 2 3 4 5 6 7 8 9 10 11 12
AME9003
1. VREF
2. CE
3. SSC
4. RDELTA
5. SSC1ST
6. RT2
7. VSS
8. OVPH
9. OVPL
10.FCOMP
11.CSDET
12.BATTFB
13. OUTC
14. OUTAPB
15. OUTA
16. VBATT
17. BRPOL
18. VDD
19. CT1
20. FB
21. COMP
22. BRIGHT
23. SSV
24. PNP
Evaluation Board Available !!
n System Block Diagram
Controller
External
Components
CCFL Array
AME
9003
+
Resistors
+
Capacitors
n Applications
l Notebook computers
l LCD/TFT displays
N
LIGHT
1
1 page  
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AME, Inc.
AME9003
Preliminary
CCFL Backlight Controller
n Ordering Information (contd.)
Part Number
AME9003AETH
AME9003AETHZ
AME9003AEPH
AME9003AEPHZ
AME9003AEJH
AME9003AEJHZ
Marking* Output Voltage Package Operating Temp. Range
AME9003AETH
xxxxxxxx
yyww
AME9003AETH
xxxxxxxx
yyww
AME9003AEPH
xxxxxxxx
yyww
AME9003AEPH
xxxxxxxx
yyww
AME9003AEJH
xxxxxxxx
yyww
AME9003AEJH
xxxxxxxx
yyww
N/A
N/A
N/A
N/A
N/A
N/A
QSOP-24
QSOP-24
PDIP-24
PDIP-24
SOIC-24
SOIC-24
- 40oC to + 85oC
- 40oC to + 85oC
- 40oC to + 85oC
- 40oC to + 85oC
- 40oC to + 85oC
- 40oC to + 85oC
Note: yyww represents the date code
* A line on top of the first letter represents lead free plating such as AME9003
Please consult AME sales office or authorized Rep./Distributor for the availability of output voltage and package type .
5
5 Page 
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AME, Inc.
AME9003
Preliminary
CCFL Backlight Controller
n Application Notes
Overview
The AME9003 application circuit drives a CCFL (cold
cathode fluorescent lamp) with a high voltage sine wave
in order to produce an efficient and cost effective light
source. The most common application for this will be as
the backlight of either a notebook computer display, flat
panel display, or personal digital assistant (PDA).
The CCFL tubes used in these applications are usually
glass rods that can range from several cm to over 30cm
and 2.5mm to 6mm in diameter. Typically they require a
sine wave of 600V and they run at a current of several
milliamperes. However, the starting (or striking) voltage
can be as high as 2000V. At start up the tube looks like
an open circuit, after the plasma has been created the
impedance drops and current starts to flow. The starting
voltage is also known as the striking voltage because
that is the voltage at which an arc ” strikes” through the
plasma. The IV characteristic of these tubes is highly
non-linear.
Traditionally the high voltage required for CCFL opera-
tion has been developed using some sort of transformer -
LC tank circuit combination driven by several small power
mosfets. The AME9003 application uses one external
PMOS, 2 external NMOS and a high turns ratio trans-
former with a centertapped primary. Lamp dimming is
achieved by turning the lamp on and off at a rate faster
than the human eye can detect, sometimes called ” duty
cycle dimming”. These "on-off" cycles are known as dim-
ming cycles. Alternate dimming schemes are also avail-
able.
Steady State Circuit Operation
Figure 1 shows a block diagram of the AME9003.
Throughout this datasheet like components have been
given the same designations even if they are on a differ-
ent figure. The block diagram shows PMOS Q2 driving
the center tap primary of T1. The gate drive of Q2 is a
pulse width modulated (PWM) signal that controls the
current into the transformer primary and by extension,
controls the current in the CCFL. The gate drive signal of
Q2 drives all the way up to the battery voltage and down
to 7.5 volts below Vbatt so that logic level transistors
may be used without their gates being damaged. An
internal clamp prevents the Q2 gate drive (OUTA) from
driving lower than Vbatt-7.5V.
NMOS transistors Q3-1 and Q3-2 alternately connect
the outside nodes of the transformer primary to VSS.
These transistors are driven by a 50% duty cycle square
wave at one-half the frequency of the drive signal applied
to the gate of Q2.
Figure 3 illustrates some ideal gate drive waveforms for
the CCFL application. Figure 4 and 5 are detailed views
of the power section from Figures 1 and 2. Figure 5 has
the transformer parasitic elements added while Figure 4
does not. Referring to Figures 4 and 5, NMOS transis-
tors Q3-1 and Q3-2 are driven out of phase with a 50%
duty cycle signal as indicated by waveforms in Figure 3.
The frequency of the NMOS drive signals will be the fre-
quency at which the CCFL is driven. PMOS transistor,
Q2, is driven with a pulse width modulated signal (PWM)
at twice the frequency of the NMOS drive signals. In
other words, the PMOS transistor is turned on and off
once for every time each NMOS transistor is on. In this
case, when NMOS transistor Q3-1 and PMOS transistor
Q2 are both on then NMOS transistor Q3-2 is off, the
side of the primary coil connected to NMOS transistor
Q3-1 is driven to ground and the centertap of the trans-
former primary is driven to the battery voltage. The other
side of the primary coil connected to NMOS transistor
Q3-2 (now ” off” ) is driven to twice the battery voltage
(because each winding of the primary has an equal num-
ber of turns).
Current ramps up in the side of the primary connected
to Q3-1 (the ” on” transistor), transferring power to the
secondary coil of transformer. The energy transferred from
the primary excites the tank circuit formed by the trans-
former leakage inductance and parasitic capacitances that
exist at the transformer secondary. The parasitic capaci-
tances come from the capacitance of the transformer sec-
ondary itself, wiring capacitances, as well as the parasitic
capacitance of the CCFL. Some applications may actu-
ally add a small amount of parallel capacitance (~10pF)
on the output of the transformer in order to dominate the
parasitic capacitive elements.
When the PMOS, Q2, is turned off, the voltage of the
transformer centertap returns to ground as does the drain
of NMOS transistor Q3-2 (the drain of Q3-2 was at twice
the battery voltage). Halfway through one cycle, NMOS
transistor Q3-1 (that was on) turns off and NMOS transis-
tor Q3-2 (that was off) turns on. At this point, PMOS
transistor Q2 turns on again, allowing current to ramp up
in the side of the primary that previously had no current.
Energy in the primary winding is transferred to the sec-
ondary winding and stored again in the leakage induc-
tance Lleak, but this time with the opposite polarity. The
current alternately goes through one primary winding then
the other.
The duty cycle of PMOS transistor Q2 controls the
amount of power transferred from the primary winding to
the secondary winding in the transformer. Note that the
CCFL circuit can work with PMOS transistor Q2 on con-
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AME9003.PDF ] | |
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