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ZL2004-01 Schematic ( PDF Datasheet ) - Intersil Corporation

Teilenummer ZL2004-01
Beschreibung Adaptive Digital DC-DC Controller
Hersteller Intersil Corporation
Logo Intersil Corporation Logo 




Gesamt 7 Seiten
ZL2004-01 Datasheet, Funktion
NROETCROEMCMOEMNZMLD8EE1ND0D1REaEDnPdFLOAZRLC6EN1ME05EWNDTEPSAIRGTNSS
Adaptive Digital DC/DC Controller with Current Sharing
ZL2004-01
The ZL2004-01 is specialized version of the ZL2004 DC/DC
controller that has been optimized for high output accuracy
within a given set of operating conditions. The ZL2004-01 is
otherwise identical to the ZL2004 in features and functionality.
The ZL2004-01 has been optimized for use with the ZL1505
MOSFET driver and discrete MOSFETs.
The ZL2004-01 integrates a proprietary Digital-DC
communication bus for current sharing and inter device
communication. Adaptive algorithms improve light load
efficiency. All operating features can be configured by simple pin-
strap selection, resistor selection or through the on-board serial
port. The PMBus™-compliant ZL2004-01 uses the SMBus™ serial
interface for communication with other Digital-DC products or a
host controller.
Related Literature
• See FN6846, ZL2004 “Adaptive Digital DC-DC Controller with
Current Sharing”
Features
• Power Conversion
• Efficient synchronous buck controller
• ± 0.2% VOUT set-point accuracy
• 8.0V to 10.0V input range
• 0.9V to 1.1V output range
• Adaptive performance optimization algorithms
• Fast load transient response
• Active current sharing
• DCR current sensing with digitally adjustable current sense range
• RoHS compliant (5mmx5mm) QFN package
• Power Management
• Digital soft-start/stop
• Precision delay and ramp-up
• Power-good/enable
• Voltage tracking, sequencing and margining
• Voltage/current/temperature monitoring
• SMBus communication (PMBus compliant)
• Output voltage and current protection
• Internal non-volatile memory (NVM)
Applications
• Servers/storage equipment
• Telecom/datacom equipment
• Power supplies (memory, DSP, ASIC, FPGA)
May 23, 2011
FN6847.2
V (0,1)
VMON
MGN
SYNC
DDC
SCL
SDA
SALRT
EN PG SS FC ILIM CFG FLEX V25 VR VDD
POWER
MANAGEMENT
NON-
VOLATILE
MEMORY
I2 C
PWM
CONTROLLER
MONITOR
ADC
LDO
LEVEL
SHIFTER
CURRENT
SENSE
TEMP
SENSOR
PWMH
PWML
ISENA
ISENB
SA (0,1)
VTRK VSEN+/-
XTEMP
SGND DGND
FIGURE 1. BLOCK DIAGRAM
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Copyright Intersil Americas Inc. 2009-2011. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.






ZL2004-01 Datasheet, Funktion
Package Outline Drawing
L32.5x5D
32 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE
Rev 1, 3/10
ZL2004-01
6
PIN 1
INDEX AREA
5.00
A
B
25
24
4X 3.5
28X 0.50
6
32 PIN #1
INDEX AREA
1
3 .50
EXP. DAP
(4X) 0.15
TOP VIEW
17
16
32X 0.40 ± 0.10
BOTTOM VIEW
8
9
4 32X 0.23
0.10 M C A B
( 4. 80 TYP )
( 3.50 )
MAX 0.90
( 28X 0 . 5 )
SIDE VIEW
SEE DETAIL "X"
0.10 C
C
SEATING PLANE
0.08 C
(32X 0 . 23 )
( 32X 0 . 60)
TYPICAL RECOMMENDED LAND PATTERN
C 0 . 2 REF 5
0 . 00 MIN.
0 . 05 MAX.
DETAIL "X"
NOTES:
1. Dimensions are in millimeters.
Dimensions in ( ) for Reference Only.
2. Dimensioning and tolerancing conform to ASME Y14.5m-1994.
3. Unless otherwise specified, tolerance : Decimal ± 0.05
4. Dimension applies to the metallized terminal and is measured
between 0.15mm and 0.30mm from the terminal tip.
5. Tiebar shown (if present) is a non-functional feature.
6. The configuration of the pin #1 identifier is optional, but must be
located within the zone indicated. The pin #1 identifier may be
either a mold or mark feature.
6 FN6847.2
May 23, 2011

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