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Número de pieza | FDS5672 | |
Descripción | N-Channel PowerTrench MOSFET | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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July 2005
FDS5672
N-Channel PowerTrench® MOSFET
60V, 12A, 10mΩ
Features
rDS(ON) = 10mΩ, VGS = 10V, ID = 12A
rDS(ON) = 14mΩ, VGS = 6V, ID = 10A
High performance trench technology for extremely low
rDS(ON)
Low gate charge
High power and current handling capability
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using
either synchronous or conventional switching PWM
controllers. It has been optimized for low gate charge, low
rDS(ON) and fast switching speed.
Applications
DC/DC converters
Branding Dash
1
2
3
4
SO-8
5
54
63
72
81
©2005 Fairchild Semiconductor Corporation
FDS5672 Rev. A
1
www.fairchildsemi.com
1 page Typical Characteristics TC = 25°C unless otherwise noted
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400
100µs
100
1ms
10
OPERATION IN THIS
AREA MAY BE
1 LIMITED BY rDS(ON)
10ms
SINGLE PULSE
TJ = MAX RATED
TA = 25oC
0.1
0.1 1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
70
Figure 5. Forward Bias Safe Operating Area
50
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R ≠ 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
10
STARTING TJ = 25oC
STARTING TJ = 150oC
1
0.1
1 10
tAV, TIME IN AVALANCHE (ms)
100
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 6. Unclamped Inductive Switching
Capability
25
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
20 VDD = 15V
15
TJ = 150oC
10
TJ = 25oC
5
TJ = -55oC
0
3.0
3.5 4.0 4.5 5.0
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 7. Transfer Characteristics
5.5
25
VGS = 6V
VGS = 5V
20
15
VGS = 10V
VGS = 4.5V
10
5
0
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
TA = 25oC
0.2 0.4 0.6 0.8
VDS, DRAIN TO SOURCE VOLTAGE (V)
1.0
Figure 8. Saturation Characteristics
15.0
12.5
VGS = 6V
10.0
VGS = 10V
7.5
5.0
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
369
ID, DRAIN CURRENT (A)
12
Figure 9. Drain to Source On Resistance vs Drain
Current
2.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.5
1.0
0.5
-80
VGS = 10V, ID = 12A
-40 0 40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
Figure 10. Normalized Drain to Source On
Resistance vs Junction Temperature
©2005 Fairchild Semiconductor Corporation
FDS5672 Rev. A
5
www.fairchildsemi.com
5 Page SPICE Thermal Model
REV June 2005
FDS5672_JA Junction Ambient
Copper Area = 1sq.in
CTHERM1 TH 8 2e-3
CTHERM2 8 7 5e-3
CTHERM3 7 6 1e-2
CTHERM4 6 5 4e-2
CTHERM5 5 4 9e-2
CTHERM6 4 3 2e-1
CTHERM7 3 2 1
CTHERM8 2 TL 3
RTHERM1 TH 8 1e-1
RTHERM2 8 7 5e-1
RTHERM3 7 6 1
RTHERM4 6 5 5
RTHERM5 5 4 8
RTHERM6 4 3 12
RTHERM7 3 2 18
RTHERM8 2 TL 25
SABER Thermal Model
SABER thermal model FDS5672
Copper Area = 1sq.in
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 8 =2e-3
ctherm.ctherm2 8 7 =5e-3
ctherm.ctherm3 7 6 =1e-2
ctherm.ctherm4 6 5 =4e-2
ctherm.ctherm5 5 4 =9e-2
ctherm.ctherm6 4 3 =2e-1
ctherm.ctherm7 3 2 =1
ctherm.ctherm8 2 tl =3
rrtherm.rtherm1 th 8 =1e-1
rtherm.rtherm2 8 7 =5e-1
rtherm.rtherm3 7 6 =1
rtherm.rtherm4 6 5 =5
rtherm.rtherm5 5 4 =8
rtherm.rtherm6 4 3 =12
rtherm.rtherm7 3 2 =18
rtherm.rtherm8 2 tl =25
}
COMPONANT
CTHERM6
CTHERM7
CTHERM8
RTHERM6
RTHERM7
RTHERM8
0.04 in2
1.2e-1
0.5
1.3
26
39
55
©2005 Fairchild Semiconductor Corporation
FDS5672 Rev. A
www.DataSheet4U.com
th JUNCTION
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
RTHERM7
RTHERM8
8
7
6
5
4
3
2
CTHERM1
CTHERM2
CTHERM3
CTHERM4
CTHERM5
CTHERM6
CTHERM7
CTHERM8
T ABLE 1. THERMAL MODELS
0.28 in2
1.5e-1
1.0
2.8
20
24
38.7
0.52 in2
2.0e-1
1.0
3.0
15
21
31.3
tl AMBIENT
0.76 in2
2.0e-1
1.0
3.0
13
19
29.7
1.0 in2
2.0e-1
1.0
3.0
12
18
25
11 www.fairchildsemi.com
11 Page |
Páginas | Total 12 Páginas | |
PDF Descargar | [ Datasheet FDS5672.PDF ] |
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