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Teilenummer | ACE24C64 |
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Beschreibung | Two-wire Serial EEPROM | |
Hersteller | ACE Technology | |
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ACE24C32/64
Technology
Two-wire Serial EEPROM
Description
The ACE24C32/64 provides 32,768/65,536 bits of serial electrically erasable and programmable read-only
memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device’s cascadable feature allows up to
8 devices to share a common two-wire bus. The device is optimized for use in many industrial and
commercial applications where low-power and low-voltage operations are essential.
Features
z Low Operation Voltage: Vcc = 1.7V to 5.5V
z Internally Organized: 4096 x 8,8192 x 8
z Two-wire Serial Interface
z Schmitt Trigger, Filtered Inputs for Noise Suppression
z Bi-directional Data Transfer Protocol
z 1MHz (2.5V~5.5V) and 400 kHz (1.7V) Compatibility
z Write Protect Pin for Hardware Data Protection
z 32-byte Page Write Modes (Partial Page Writes are Allowed)
z Self-timed Write Cycle (5 ms max)
z High-reliability - Endurance: 1,000,000 Write Cycles
- Data Retention: 100 Years
z TDFN ROHS compliant Packages
z Wafer Sales: available in inked wafer Form
Absolute Maximum Ratings
Operating Temperature
Storage Temperature
-55℃ to +125℃
-65℃ to +150℃
Voltage on Any Pin with Respect to Ground -1.0V to +7.0V
Maximum Operating Voltage
6.25V
DC Output Current
5.0 mA
*Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Packaging Type
TDFN
VER 1.3 1
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ACE24C32/64
Technology
Two-wire Serial EEPROM
Device Operation
Clock and Data Transitions:
The SDA pin is normally pulled high with an external device. Data on the SDA pin may change only
during SCL low time periods (refer to Figure 4). Data changes during SCL high periods will indicate a
start or stop condition as defined below.
Start Condition:
A high-to-low transition of SDA with SCL high is a start condition which must precede any other
command (refer to Figure 5).
Stop Condition:
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the stop command
will place the EEPROM in a standby power mode (refer to Figure 5).
Acknowledge:
All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word.
Standby Mode :
The ACE24C32/64 features a low-power standby mode which is enabled: (a) upon power-up and (b)
after the receipt of the stop bit and the completion of any internal operations.
Memory Reset :
After an interruption in protocol power loss or system reset, any two-wire part can be protocol reset by following
these steps:
1. Clock up to 9 cycles.
2. Look for SDA high in each cycle while SCL is high and then.
3. Create a start condition as SDA is high.
Bus Timing
Figure 2.SCL: Serial Clock, SDA: Serial Data I/O
VER 1.3 6
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ACE24C32/64
Technology
Two-wire Serial EEPROM
Packaging information
TDFN
Top View
Bottom View
Side View
*Control Dimensions: Millimeter
Symbol
Millimeter
Min. Max.
A
0.700
0.800
A1
0.000
0.050
A3 0.203REF.
D
1.900
2.100
E
2.900
3.100
D1
1.400
1.600
E1
1.400
1.600
k 0.200MIN.
b
0.200
0.300
e 0.500TYP.
L
0.200
0.400
VER 1.3 12
12 Page | ||
Seiten | Gesamt 13 Seiten | |
PDF Download | [ ACE24C64 Schematic.PDF ] |
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