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PDF TPCP8H02 Data sheet ( Hoja de datos )

Número de pieza TPCP8H02
Descripción Multi-chip Device Epitaxial Transistor
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TPCP8H02 Hoja de datos, Descripción, Manual

TPCP8H02
TOSHIBA Multi-Chip Transistor
www.DataSheet4U.com
Silicon NPN Epitaxial Type, Field Effect Transistor Silicon N Channel MOS Type
TPCP8H02
STROBE FLASH APPLICATIONS
HIGH-SPEED SWITCHING APPLICATIONS
DC-DC CONVERTER APPLICATIONS
0.33±0.05
0.05 M A
85
Multi-chip discrete device; built-in NPN transistor for main switch and
N-ch MOS FET for drive
High DC current gain: hFE = 250 to 400 (IC = 0.3 A) (NPN transistor)
Low collector-emitter saturation voltage: VCE (sat) = 0.14 V (max)
(NPN transistor)
High-speed switching: tf = 25 ns (typ.) (NPN transistor)
Absolute Maximum Ratings (Ta = 25°C)
Transistor
Characteristics
Collector-base voltage
Collector-emitter voltage
Emitter-base voltage
Collector current
DC (Note 1)
Pulse (Note 1)
Base current
Collector power dissipation (NPN)
Junction temperature
Symbol
VCBO
VCEX
VCEO
VEBO
IC
ICP
IB
PC (Note 2)
Tj
Rating
50
50
30
6
3.0
5.0
0.3
1.0
150
Unit
V
V
V
A
A
W
°C
MOS FET
0.475
1
0.65
2.9±0.1
4
S
0.025 S
0.17±0.02
B 0.05 M B
A
0.8±0.05
0.28
+0.1
-0.11
1.12+-00..1132
1.12+-00..1132
1. SOURCE
2. COLLECTOR
3. COLLECTOR
4. COLLECTOR
0.28
+0.1
-0.11
5. BASE
6. EMITTER
7. GATE
8. DRAIN
JEDEC
-
JEITA
-
TOSHIBA 2-3V1E
Circuit Configuration
8765
Characteristics
Symbol
Rating
Unit
Drain-Source Voltage
Gate-Source Voltage
Drain Current
Channel Temperature
DC
Pulse
VDSS
VGSS
ID
IDP
Tch
20
±10
100
200
150
V
V
mA
°C
1234
Note 1: Ensure that the junction (channel) temperature does not exceed 150.
Note 2: Device mounted on a glass-epoxy board (FR-4,25.4×25.4×1.6 mm , Cu area: 645 mm2)
Note 3: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/Derating Concept and Methods) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
This transistor is an electrostatic-sensitive device. Please handle with caution.
1 2006-11-13

1 page




TPCP8H02 pdf
rth (j-c) – tw
1000
TPCP8H02
www.DataSheet4U.com
100
10
1
0.001
0.01
Curves should be applied in thermal limited area.
Single nonrepetitive pulse Ta = 25°C
Mounted on FR4 board (glass epoxy, 1.6 mm thick, Cu area: 645 mm2)
0.1 1 10 100 1000
Pulse width tw (s)
Safe operating area
10
IC max (Pulsed) * 10 ms* 1 ms* 100 μs*
IC max (Continuous)
10 μs*
100 ms*
1 10 s*
DC operation
(Ta = 25°C)
*: Single nonrepetitive pulse
Ta = 25°C
Note that the curves for 100 ms,
0.1
10 s and DC operation will be
different when the devices aren’t
mounted on an FR4 board (glass
epoxy, 1.6 mm thick, Cu area:
645 mm2).
Single-device operation
These characteristic curves must
be derated linearly with increase
in temperature.
0.01
0.1 1
10
Collectoremitter voltage VCE (V)
100
5 2006-11-13

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