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ADP124 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer ADP124
Beschreibung (ADP124 / ADP125) CMOS LINEAR REGULATOR W/31 FIXED-OUTPUT VOLTAGES
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 20 Seiten
ADP124 Datasheet, Funktion
5.5 V Input, 500 mA, Low Quiescent
Current, CMOS Linear Regulators
ADP124/ADP125
FEATURES
Input voltage supply range: 2.3 V to 5.5 V
500 mA maximum output current
Fixed and adjustable output voltage versions
1% initial accuracy
Up to 31 fixed-output voltage options available
from 1.75 V to 3.3 V
Adjustable-output voltage range from 0.8 V to 5.0 V
Very low dropout voltage: 130 mV
Low quiescent current: 45 μA
Low shutdown current: <1 μA
Excellent PSRR performance: 60 dB at 100 kHz
Excellent load/line transient response
Optimized for small 1.0 μF ceramic capacitors
Current limit and thermal overload protection
Logic controlled enable
Compact 8-lead exposed paddle MSOP package
APPLICATIONS
Digital camera and audio devices
Portable and battery-powered equipment
Automatic meter reading (AMR) meters
GPS and location management units
Medical instrumentation
Point of load power
TYPICAL APPLICATION CIRCUITS
VOUT = 3.3V
C2
1 VOUT VIN 8
ADP124
2 VOUT VIN 7
VIN = 5.5V
C1
3
VOUT
SENSE
4 GND
NC 6
ON
EN 5
OFF
Figure 1. ADP124 with Fixed Output Voltage
VOUT = 3.3V
C2 R1
R2
1 VOUT VIN 8
ADP125
2 VOUT VIN 7
VIN = 5.5V
C1
3 ADJ
4 GND
NC 6
ON
EN 5
OFF
Figure 2. ADP 125 with Adjustable Output Voltage
GENERAL DESCRIPTION
www.DaTthaeShAeDetP41U2.c4o/AmDP125 are low quiescent current, low dropout
linear regulators. They are designed to operate from an input
voltage between 2.3 V and 5.5 V and to provide up to 500 mA of
output current. The low 130 mV dropout voltage at a 500 mA
load improves efficiency and allows operation over a wide input
voltage range.
The low 210 μA of quiescent current with a 500 mA load makes the
ADP124/ADP125 ideal for battery-operated portable equipment.
The ADP124 is capable of 31 fixed-output voltages from 1.75 V
to 3.3 V. The ADP125 is the adjustable version of the device and
allows the output voltage to be set between 0.8 V and 5.0 V by
an external voltage divider.
The ADP124/ADP125 are specifically designed for stable operation
with tiny 1 μF ceramic input and output capacitors to meet the
requirements of high performance, space constrained applications.
The ADP124/ADP125 have an internal soft start that gives a
constant start-up time of 350 μs. Short-circuit protection and
thermal overload protection circuits prevent damage in adverse
conditions. The ADP124/ADP125 are available in an 8-lead
exposed paddle MSOP package. When compared with the
standard MSOP package, the exposed paddle MSOP package
has lower thermal resistance (θJA). The lower thermal resistance
package allows the ADP124/ADP125 to meet the needs of a
variety of portable applications while minimizing the rise in
junction temperature.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.






ADP124 Datasheet, Funktion
ADP124/ADP125
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
VOUT 1
VOUT 2
VOUT SENSE 3
GND 4
ADP124
TOP VIEW
(Not to Scale)
8 VIN
7 VIN
6 NC
5 EN
NC = NO CONNECT
Figure 3. ADP124 Fixed Output Pin Configuration
VOUT 1
VOUT 2
ADJ 3
GND 4
ADP125
TOP VIEW
(Not to Scale)
8 VIN
7 VIN
6 NC
5 EN
NC = NO CONNECT
Figure 4. ADP125 Adjustable Output Pin Configuration
Table 5. Pin Function Descriptions
Mnemonic
Pin No. ADP124
ADP125
1 VOUT
VOUT
2 VOUT
VOUT
3 VOUT SENSE N/A
N/A ADJ
4 GND
5 EN
GND
EN
6 NC
7 VIN
8 VIN
EP
NC
VIN
VIN
EP
Description
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Regulated Output Voltage. Bypass VOUT to GND with a 1 μF or greater capacitor.
Feedback Node for the Error Amplifier. Connect to VOUT.
Feedback Node for the Error Amplifier. Connect the midpoint of an external divider from
VOUT to GND to this pin to set the output voltage.
Ground.
Enable Input. Drive EN high to turn on the regulator; drive EN low to turn off the regulator.
For automatic startup, connect EN to VIN.
No Connect. This pin is not connected internally.
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
Regulator Input Supply. Bypass VIN to GND with a 1 μF or greater capacitor.
The exposed pad must be connected to ground.
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Rev. 0 | Page 6 of 20

6 Page









ADP124 pdf, datenblatt
ADP124/ADP125
APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP124/ADP125 are designed for operation with small,
space-saving ceramic capacitors, but these devices can function
with most commonly used capacitors as long as care is taken to
ensure an appropriate effective series resistance (ESR) value. The
ESR of the output capacitor affects the stability of the LDO control
loop. A minimum of 0.70 μF capacitance with an ESR of 1 Ω or
less is recommended to ensure stability of the ADP124/ADP125.
The transient response to changes in load current is also affected by
the output capacitance. Using a larger value of output capacitance
improves the transient response of the ADP124/ADP125 to
dynamic changes in load current. Figure 28 and Figure 29 show
the transient responses for output capacitance values of 1 μF and
4.7μF, respectively.
IOUT
1mA TO 500mA LOAD STEP
1
2
VOUT
VIN = 4V
VOUT = 3.3V
CH1 500mA BW CH2 50.0mV BW M400ns A CH1 200mA
T 13.20%
Figure 28. Output Transient Response, COUT = 1 μF
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IOUT
1mA TO 500mA LOAD STEP
1
2
VOUT
VIN = 4V
VOUT = 3.3V
CH1 500mA BW CH2 50.0mV BW M400ns A CH1 200mA
T 13.60%
Figure 29. Output Transient Response, COUT = 4.7 μF
Input Bypass Capacitor
Connecting a 1 μF capacitor from VIN to GND reduces the circuit
sensitivity to the printed circuit board (PCB) layout, especially
when a long input trace or high source impedance is encountered.
If greater than 1 μF of output capacitance is required, the input
capacitor should be increased to match it.
Input and Output Capacitor Properties
Any good quality ceramic capacitors can be used with the
ADP124/ADP125, as long as the capacitor meets the minimum
capacitance and maximum ESR requirements. Ceramic capacitors
are manufactured with a variety of dielectrics, each with different
behavior over temperature and applied voltage. Capacitors must
have an adequate dielectric to ensure the minimum capacitance
over the necessary temperature range and dc bias conditions.
Using an X5R or X7R dielectric with a voltage rating of 6.3 V or
10 V is recommended. However, using Y5V and Z5U dielectrics
are not recommended for any LDO, due to their poor temperature
and dc bias characteristics.
Figure 30 depicts the capacitance vs. capacitor voltage bias charac-
teristics of an 0402, 1 μF, 10 V X5R capacitor. The voltage stability
of a capacitor is strongly influenced by the capacitor size and the
voltage rating. In general, a capacitor in a larger package or of a
higher voltage rating exhibits better stability. The temperature
variation of the X5R dielectric is about ±15% over the −40°C to
+85°C temperature range and is not a function of package or
voltage rating.
1.10
1.05
1.00
0.95
0.90
0.85
0.80
0.75
0.70
01234567
BIAS VOLTAGE (V)
Figure 30. Capacitance vs. Capacitor Voltage Bias Characteristics
Equation 1 can be used to determine the worst-case capacitance,
accounting for capacitor variation over temperature, component
tolerance, and voltage.
CEFF = C × (1 − TEMPCO) × (1 − TOL)
(1)
where:
CEFF is the effective capacitance at the operating voltage.
C is the rated capacitance value.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
Rev. 0 | Page 12 of 20

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