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WCMA1016U4X Schematic ( PDF Datasheet ) - Weida Semiconductor

Teilenummer WCMA1016U4X
Beschreibung 64K x 16 Static RAM
Hersteller Weida Semiconductor
Logo Weida Semiconductor Logo 




Gesamt 11 Seiten
WCMA1016U4X Datasheet, Funktion
1
WCMA1016U4X
Features
• High Speed
— 55ns and 70ns availability
Low voltage range
2.7V3.6V
• Ultra-low active power
• Low standby power
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The WCMA1016U4X is a high-performance CMOS static
RAM organized as 64K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This device s ideal for portable applications such as cellular
telephones. The device also has an automatic power-down
feature that significantly reduces power consumption by 99%
when addresses are not toggling. The device can also be put
into standby mode when deselected (CE HIGH or both BLE
Logic Block Diagram
www.DataSheet4U.com
AA190
A8
A7
A6
A5
A4
A3
AA21
A0
DATA IN DRIVERS
64K x 16
RAM Array
2048 X 512
64K x 16 Static RAM
and BHE are HIGH). The input/output pins (I/O0 through I/O15)
are placed in a high-impedance state when: deselected (CE
HIGH), outputs are disabled (OE HIGH), both Byte High En-
able and Byte Low Enable are disabled (BHE, BLE HIGH), or
during a write operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A15). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A15).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O8 to I/O15. See the
Truth Table at the back of this data sheet for a complete de-
scription of read and write modes.
The WCMA1016U4X is available in a 48-ball FBGA package.
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
Power -Down
Circuit
CE
BHE
BLE
BHE
WE
CE
OE
BLE






WCMA1016U4X Datasheet, Funktion
Switching Waveforms
[11, 12]
Read Cycle No. 1(Address Transition Controlled)
ADDRESS
DATA OUT
tOHA
PREVIOUS DATA VALID
tAA
tRC
WCMA1016U4X
DATA VALID
Read Cycle No. 2 (OE Controlled) [12, 13]
ADDRESS
CE
OE
BHE/BLE
tACE
tDOE
tLZOE
DATA OUT
www.DataSheet4U.com
VCC
SUPPLY
CURRENT
tDBE
tLZBE
HIGH IMPEDANCE
tLZCE
tPU
50%
tRC
Notes:
11. Device is continuously selected. OE, CE = VIL, BHE and/or BLE = VIL.
12. WE is HIGH for read cycle.
13. Address valid prior to or coincident with CE, BHE, BLE, transition LOW.
DATA VALID
tPD
tHZCE
tHZOE
tHZBE
HIGH
IMPEDANCE
50%
ICC
ISB
6

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