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PDF ADL5504 Data sheet ( Hoja de datos )
| Número de pieza | ADL5504 | |
| Descripción | 450 MHz to 6000 MHz TruPwr Detector | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
True rms response detector
Excellent temperature stability
±0.25 dB rms detection accuracy vs. temperature
Over 35 dB input power dynamic range, inclusive of crest factor
RF bandwidths from 450 MHz to 6000 MHz
500 Ω input impedance
Single-supply operation: 2.5 V to 3.3 V
Low power: 1.8 mA at 3.0 V supply
RoHS compliant part
APPLICATIONS
Power measurement of W-CDMA, CDMA2000, QPSK-/QAM-
based OFDM (LTE and WiMAX), and other complex
modulation waveforms
RF transmitter or receiver power measurement
450 MHz to 6000 MHz
TruPwr Detector
ADL5504
FUNCTIONAL BLOCK DIAGRAM
VPOS
ENBL
RFIN
ADL5504
1kΩ
RMS CORE
INTERNAL
FILTERING
100Ω
BUFFER
FLTR
VRMS
COMM
Figure 1.
10
1
0.1
www.DaGtaESNhEeeRt4AUL.cDomESCRIPTION
The ADL5504 is a TruPwr™ mean-responding (true rms) power
detector for use in high frequency receiver and transmitter signal
chains from 450 MHz to 6000 MHz. Requiring only a single
supply between 2.5 V and 3.3 V, the detector draws less than
1.8 mA. The input is internally ac-coupled and has a nominal
input impedance of 500 Ω. The rms output is a linear-responding
dc voltage with a conversion gain of 1.87 V/V rms at 900 MHz.
The ADL5504 is a highly accurate, easy to use means of
determining the rms of complex waveforms. It can be used for
power measurements of both simple and complex waveforms
but is particularly useful for measuring high crest factor (high
peak-to-rms ratio) signals, such as W-CDMA, CDMA2000,
WiMAX, WLAN, and LTE waveforms.
0.01
–25 –20 –15 –10
–5
0
INPUT (dBm)
5 10 15
Figure 2. Output vs. Input Level, 3 V Supply, Frequency 1900 MHz
The on-chip modulation filter provides adequate averaging for
most waveforms. For more complex waveforms, an external
capacitor at the FLTR pin can be used for supplementary signal
demodulation. An on-chip, 100 Ω series resistance at the output,
combined with an external shunt capacitor, creates a low-pass filter
response that reduces the residual ripple in the dc output voltage.
The ADL5504 offers excellent temperature stability across a
30 dB range and near 0 dB measurement error across temperature
over the top portion of the dynamic range. In addition to its
temperature stability, the ADL5504 offers low process variations
that further reduce calibration complexity.
The power detector operates from −40°C to +85°C and is
available in a 6-ball, 0.8 mm × 1.2 mm, wafer level chip scale
package. It is fabricated on a high fT silicon BiCMOS process.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page  
ADL5504
Parameter
RF INPUT (f = 6000 MHz)
Input Impedance
RMS Conversion
Dynamic Range1
±1 dB Error3
±2 dB Error3
Maximum Input Level
Minimum Input Level
Conversion Gain
Output Intercept4
Output Voltage, High Input Power
Output Voltage, Low Input Power
Temperature Sensitivity
VRMS OUTPUT
Output Offset
Maximum Output Voltage
Available Output Current
Pulse Response Time
ENABLE INTERFACE
Logic Level to Enable Power, High Condition
Input Current when High
Logic Level to Disable Power, Low Condition
Power-Up Response Time5
POWER SUPPLIES
Operating Range
Quiescent Current6
Disable Current7
Test Conditions
Input RFIN to output VRMS
No termination
CW input, −40°C < TA < +85°C
±0.25 dB error3
±1 dB error3
VRMS = (gain × VIN) + intercept
PIN = 5 dBm, 400 mV rms
PIN = −15 dBm, 40 mV rms
PIN = 0 dBm
25°C < TA < 85°C
−40°C < TA < +25°C
Pin VRMS
No signal at RFIN
VS = 3.0 V, RLOAD ≥ 10 kΩ
10 dB step, 10% to 90% of settling level, no filter
capacitor
Pin ENBL
2.5 V ≤ VS ≤ 3.3 V, −40°C < TA < +85°C
2.5 V at ENBL, –40°C < TA < +85°C
2.5 V ≤ VS ≤ 3.3 V, −40°C < TA < +85°C
CFLTR = open, 0 dBm at RFIN
CFLTR = 10 nF, 0 dBm at RFIN
−40°C < TA < +85°C
No signal at RFIN, ENBL high input condition
ENBL input low condition
www.Da1 TtahSe haveaeilta4bUle.cooumtput swing and, therefore, the dynamic range are altered by the supply voltage; see Figure 8.
2 Error referred to delta from 25°C response; see Figure 13 to Figure 15 and Figure 19 to Figure 21.
3 Error referred to best-fit line at 25°C; see Figure 10 to Figure 12 and Figure 16 to Figure 18.
4 Calculated using linear regression.
5 The response time is measured from 10% to 90% of settling level; see Figure 31 to Figure 33.
6 Supply current is input level-dependent; see Figure 27.
7 Guaranteed but not tested; limits are specified at six sigma levels.
Min Typ
90||0.31
25
34
12
−16
0.82
-0.005
0.314
0.027
0.0108
0.0120
10
2.5
3
3
1.8
0.05
−0.5
1
8
2.5
1.8
0.1
Max Unit
Ω||pF
dB
dB
dBm
dBm
V/V rms
V
V
V
dB/°C
dB/°C
100 mV
V
mA
μs
VPOS
V
0.1 μA
+0.5 V
μs
μs
3.3 V
mA
1 μA
Rev. 0 | Page 5 of 24
5 Page 
3
CW
12.2kbps, DPCCH (–5.46dB, 15kSPS) + DPDCH
(0dB, 60kSPS), 3.4dB CF
2 144kbps, DPCCH (–11.48dB, 15kSPS) + DPDCH
(0dB, 480kSPS), 3.3dB CF
768kbps, DPCCH (–11.48dB, 15kSPS) + DPDCH1 + 2
(0dB, 960kSPS), 5.8dB CF
1
0
–1
–2
–3
–25
DPCCH (–6.02dB, 15kSPS) + DPDCH (–4.08dB, 60kSPS) +
HS-DPCCH (0dB, 15kSPS), 4.91dB CFDPCCH (–6.02dB,
15kSPS) + DPDCH (–11.48dB, 60kSPS) + HS-DPCCH (0dB,
15kSPS), 5.34dB CF
DPCCH (–6.02dB, 15kSPS) + HS-DPCCH (0dB, 15kSPS),
5.44dB CF
–20 –15 –10 –5
0
5 10 15
INPUT (dBm)
Figure 22. Error from CW Linear Reference vs. Input with Various
W-CDMA Reverse Link Waveforms at 900 MHz, CFLTR = 10 nF, COUT = Open
3
CW
TEST MODEL 1 WITH 16 DPCH, 1 CARRIER
2 TEST MODEL 1 WITH 32 DPCH, 1 CARRIER
TEST MODEL 1 WITH 64 DPCH, 1 CARRIER
TEST MODEL 1 WITH 64 DPCH, 2 CARRIERS
TEST MODEL 1 WITH 64 DPCH, 3 CARRIERS
1 TEST MODEL 1 WITH 64 DPCH, 4 CARRIERS
0
–1
–2
–3
–25 –20 –15 –10
–5
0
5 10 15
INPUT (dBm)
Figure 23. Error from CW Linear Reference vs. Input with Various
W-CDMA Forward Link Waveforms at 2200 MHz, CFLTR = 10 nF, COUT = Open
www.DataSheet34U.com
CW
BPSK, 11dB CF
QPSK, 11dB CF
2 16QAM, 12dB CF
64QAM, 11dB CF
1
0
–1
–2
–3
–25 –20 –15 –10
–5
0
5 10 15
INPUT (dBm)
Figure 24. Error from CW Linear Reference vs. Input with Various
802.16 OFDM Waveforms at 3500 MHz, 10 MHz Signal BW, and
256 Subcarriers for All Modulated Signals, CFLTR = 10 nF, COUT = Open
ADL5504
3
CW
PICH, 4.7dB
PICH + FCH (9.6kbps), 4.8dB CF
2 PICH + FCH (9.6kbps) + DCCH, 6.3dB CF
PICH + FCH (9.6kbps) + SCH (153.6kbps), 6.7dB
PICH + FCH (9.6kbps) + DCCH +SCH (153.6kbps), 7.6dB CF
1
0
–1
–2
–3
–25 –20 –15 –10
–5
0
5 10 15
INPUT (dBm)
Figure 25. Error from CW Linear Reference vs. Input with Various
CDMA2000 Reverse Link Waveforms at 1900 MHz, CFLTR = 12 nF, COUT = Open
3
CW
16QAM RB1
16QAM RB10
2 16QAM RB100
QPSK RB1
QPSK RB10
QPSK RB100
1
0
–1
–2
–3
–25 –20 –15 –10
–5
0
5 10 15
INPUT (dBm)
Figure 26. Error from CW Linear Reference vs. Input with Various
LTE Reverse Link Waveforms at 2600 MHz, CFLTR = 12 nF, COUT = Open
15
14
13
12
11
10
9
8
7 2.5V
6
5
4
3
2
1
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
INPUT (V rms)
Figure 27. Supply Current vs. Input Level, 2.5 V, 3.0 V, and 3.3 V Supplies,
900 MHz Frequency, at −40°C, +25°C, and +85°C
Rev. 0 | Page 11 of 24
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet ADL5504.PDF ] | |
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