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93AA46B Schematic ( PDF Datasheet ) - Microchip Technology

Teilenummer 93AA46B
Beschreibung (93AAxxx) 1K-16K Microwire Compatible Serial EEPROMs
Hersteller Microchip Technology
Logo Microchip Technology Logo 




Gesamt 38 Seiten
93AA46B Datasheet, Funktion
93AA46A/B/C, 93LC46A/B/C, 93C46A/B/C
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C
93AA76A/B/C, 93LC76A/B/C, 93C76A/B/C
93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
1K-16K Microwire Compatible Serial EEPROMs
Features:
• Densities from 1 Kbits through 16 Kbits
• Low-power CMOS technology
• Available with or without ORG function:
With ORG function:
- ORG pin at Logic Low: 8-bit word
- ORG pin at Logic High: 16-bit word
Without ORG function:
- ‘A’ version: 8-bit word
- ‘B’ version: 16-bit word
• Program Enable pin:
- Write-protect for entire array
(93XX76C and 93XX86C only)
• Self-timed Erase/Write cycles
(including auto-erase)
• Automatic ERAL before WRAL
• Power-on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device Status signal (Ready/Busy)
• Sequential Read function
• 1,000,000 E/W cycles
• Data retention > 200 years
• Pb-free and RoHS compliant
• Temperature ranges supported:
www.DataSheet4U.com
- Industrial (I)
-40°C to +85°C
- Automotive (E)
-40°C to +125°C
Pin Function Table
Name
Function
CS Chip Select
CLK Serial Data Clock
DI Serial Data Input
DO Serial Data Output
VSS Ground
PE Program Enable
ORG Memory Configuration
VCC
Note:
Power Supply
ORG and PE functionality not available in
all products. See Table 1-1, Device
Selection Table.
Description:
Microchip Technology Inc. supports the 3-wire
Microwire bus with low-voltage serial Electrically
Erasable PROMs (EEPROM) that range in density
from 1 Kbits up to 16 Kbits. Each density is available
with and without the ORG functionality, and selected
by the part number ordered. Advanced CMOS technol-
ogy makes these devices ideal for low-power, nonvol-
atile memory applications. The entire series of
Microwire devices are available in the standard 8-lead
PDIP and SOIC packages, as well as the more
advanced packaging such as the 8-lead MSOP, 8-lead
TSSOP, 6-lead SOT-23, and 8-lead DFN (2x3). All
packages are Pb-free.
Pin Diagrams (not to scale)
PDIP/SOIC
(P, SN)
CS 1
CLK 2
DI 3
DO 4
8
7
6
5
ROTATED SOIC
(ex: 93LC46BX)
VCC
NC
(2,3)
PE VCC
(1,3)
ORG CS
1
2
3
(1,3)
8 ORG
7 VSS
6 DO
VSS CLK 4
5 DI
DFN (MC)
CS 1
CLK 2
DI 3
DO 4
8 VCC
7 PE(2,3)
6 ORG(1,3)
5 VSS
TSSOP/MSOP
(ST, MS)
CS
CLK
DI
DO
1
2
3
4
8 VCC
DO
7 PE(2,3)
6 ORG(1,3) VSS
5 VSS
DI
SOT-23
(OT)
16
25
34
VCC
CS
CLK
Note 1: ORG pin: Only on 93XX46C/56C/66C/76C/86C.
2: PE pin: Only on 93XX76C/86C.
3: ORG/PE: No internal connections on 93XXA/B.
© 2007 Microchip Technology Inc.
DS21929D-page 1






93AA46B Datasheet, Funktion
93XX46X/56X/66X/76X/86X
FIGURE 2-1:
SYNCHRONOUS DATA TIMING
CS VIH
VIL TCSS TCKH
TCKL
VIH
CLK
TCSH
VIL
VIH
DI
TDIS
TDIH
VIL
DO VOH
TPD
TPD TCZ
(Read) VOL
DO VOH
(Program) VOL
TSV
Status Valid
TCZ
Note: Status Valid Time (TSV) is relative to CS.
www.DataSheet4U.com
DS21929D-page 6
© 2007 Microchip Technology Inc.

6 Page









93AA46B pdf, datenblatt
93XX46X/56X/66X/76X/86X
3.5 ERASE ALL (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical ‘1’ state. The ERAL cycle
is identical to the Erase cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93CXX’ devices where the rising edge of CLK before
the last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
The DO pin indicates the Ready/Busy status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL).
VCC must be 4.5V for proper operation of ERAL.
Note:
After the ERAL command is complete,
issuing a Start bit and then taking CS low
will clear the Ready/Busy status from DO.
FIGURE 3-3:
CS
CLK
ERAL TIMING FOR 93AAXX AND 93LCXX DEVICES
TCSL
Check Status
DI 1
DO High-Z
00
10
X •••
X
Vcc must be 4.5V for proper operation of ERAL.
TSV
Busy
TEC
TCZ
Ready
High-Z
FIGURE 3-4:
www.DataSheet4U.com
CS
ERAL TIMING FOR 93CXX DEVICES
TCSL
Check Status
CLK
DI
1
00
10
X •••
X
DO High-Z
TSV
Busy
TEC
TCZ
Ready
High-Z
DS21929D-page 12
© 2007 Microchip Technology Inc.

12 Page





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