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PDF HT45FM03B Data sheet ( Hoja de datos )
| Número de pieza | HT45FM03B | |
| Descripción | Brushless DC Motor Flash Type 8-Bit MCU | |
| Fabricantes | Holtek Semiconductor | |
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HT45FM03B
Brushless DC Motor Flash Type 8-Bit MCU
Technical Document
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
· Operating voltage:
fSYS= 0.4~20MHz: 4.5V~5.5V
· 26 bidirectional I/O lines
· External interrupt inputs shared with 4 I/O lines
· 8-bit programmable Timer/Event Counter with
overflow interrupt and 7-stage prescaler
· 16-bit programmable Timer/Event Counter with
overflow interrupt and 7-stage prescaler
· 4096´15 Flash Program Memory
· 192´8 Data Memory RAM
· On-chip crystal, internal RC and external RC
oscillator
· Fully integrated internal RC oscillator with three
fixed frequencies: 12MHz, 16MHz or 20MHz
· Watchdog Timer function
· PFD for audio frequency generation
· Power down and wake-up functions to reduce
power consumption
· Up to 0.2ms instruction cycle with 20MHz system
clock at VDD=5V
· 8-level subroutine nesting
· 8 channel 12-bit resolution A/D converter
· 3 pairs of 10-bit PWM with complementary outputs
shared with six I/O lines and with 3 PWM duty
control registers
· Bit manipulation instruction
· Table read instructions
· 63 powerful instructions
· All instructions in one or two machine cycles
· Low voltage reset function
· Low voltage detect function
· Integrated operational Amplifier
· Integrated Analog Comparator with interrupt function
· 28-pin SOP package
General Description
The HT45FM03B is 8-bit, high performance, RISC ar-
chitecture microcontroller device which includes a host
of fully integrated special features specifically designed
for brushless DC motor applications.
www.DataSheet4UT.hceomadvantages of low power consumption, I/O flexibil-
ity, programmable frequency divider, timer functions,
oscillator options, multi-channel A/D Converter, Pulse
Width Modulation function, power-down and wake-up
functions, although especially directed at brushless DC
motor applications, the enhanced versatility of this de-
vice also makes it applicable for use in a wide range of
A/D application possibilities such as sensor signal pro-
cessing, motor driving, industrial control, consumer
products, subsystem controllers, etc.
Rev. 1.00
1 December 16, 2009
1 page  
HT45FM03B
A.C. Characteristics
Ta=25°C
Symbol
Parameter
fSYS System Clock
Test Conditions
VDD Conditions
¾ 4.5V~5.5V
5V Ta=25°C
5V Ta=25°C
5V Ta=25°C
Ta= -20°C~125°C
fHIRC
System Clock (HIRC)
Ta= -20°C~125°C
4.5V~ Ta= -20°C~125°C
5.5V Ta= -40°C~125°C
Ta= -40°C~125°C
Ta= -40°C~125°C
fERC System Clock (ERC)
5V Ta=25°C, R=120kW *
4.5V~ Ta= -40°C~125°C,
5.5V R=120kW *
fTIMER
Timer I/P Frequency
(TMR0/TMR1)
¾¾
tWDTOSC Watchdog Oscillator Period
5V
¾
tRES External Reset Low Pulse Width ¾
¾
tSST System Start-up Timer Period
¾ Wake-up from HALT
tINT Interrupt Pulse Width
¾¾
tLVR Low Voltage Width to Reset
¾
¾
Min.
400
-2%
-2%
-2%
-8%
-7%
-9%
-9%
-8%
-12%
-2%
-5%
0
32
1
¾
1
0.25
Typ.
¾
12
16
20
12
16
20
12
16
20
12
12
¾
65
¾
1024
¾
1
Max.
20000
+2%
+2%
+2%
+4%
+5%
+4%
+4%
+5%
+4%
+2%
+4%
4000
130
¾
¾
¾
2
Unit
kHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
kHz
ms
ms
tSYS
ms
ms
Note: 1. tSYS=1/fSYS
2. * For fERC, as the resistor tolerance will influence the frequency a precision resistor is recommended.
3. To maintain the accuracy of the internal HIRC oscillator frequency, a 0.1mF decoupling capacitor should be
connected between VDD and VSS and located as close to the device as possible.
www.DataSheet4U.com
Rev. 1.00
5 December 16, 2009
5 Page 
Program Counter
During program execution, the Program Counter is used
to keep track of the address of the next instruction to be
executed. It is automatically incremented by one each
time an instruction is executed except for instructions,
such as ²JMP² or ²CALL², that demand a jump to a
non-consecutive Program Memory address. It must be
noted that only the lower 8 bits, known as the Program
Counter Low Register, are directly addressable by user.
When executing instructions requiring jumps to
non-consecutive addresses such as a jump instruction,
a subroutine call, interrupt or reset, etc., the
microcontroller manages program control by loading the
required address into the Program Counter. For condi-
tional skip instructions, once the condition has been
met, the next instruction, which has already been
fetched during the present instruction execution, is dis-
carded and a dummy cycle takes its place while the cor-
rect instruction is obtained.
The lower byte of the Program Counter, known as the
Program Counter Low register or PCL, is available for
program control and is a readable and writable register.
By transferring data directly into this register, a short
program jump can be executed directly, however, as
only this low byte is available for manipulation, the
jumps are limited to the present page of memory, that is
256 locations. When such program jumps are executed
it should also be noted that a dummy cycle will be in-
serted.
The lower byte of the Program Counter is fully accessi-
ble under program control. Manipulating the PCL might
cause program branching, so an extra cycle is needed
to pre-fetch. Further information on the PCL register can
be found in the Special Function Register section.
HT45FM03B
Stack
This is a special part of the memory which is used to
save the contents of the Program Counter only. The
stack has 8 levels and is neither part of the data nor part
of the program space, and can neither be read from nor
writeable. The activated level is indexed by the Stack
Pointer, SP, and is neither readable nor writeable. At a
subroutine call or interrupt acknowledge signal, the con-
tents of the Program Counter are pushed onto the stack.
At the end of a subroutine or an interrupt routine, sig-
naled by a return instruction, RET or RETI, the Program
Counter is restored to its previous value from the stack.
After a device reset, the Stack Pointer will point to the
top of the stack.
P ro g ra m C o u n te r
T o p o f S ta c k
S ta c k
P o in te r
S ta c k L e v e l 1
S ta c k L e v e l 2
S ta c k L e v e l 3
P ro g ra m
M e m o ry
B o tto m o f S ta c k
S ta c k L e v e l 8
If the stack is full and an enabled interrupt takes place,
the interrupt request flag will be recorded but the ac-
knowledge signal will be inhibited. When the Stack
Pointer is decremented, by RET or RETI, the interrupt
will be serviced. This feature prevents stack overflow al-
lowing the programmer to use the structure more easily.
However, when the stack is full, a CALL subroutine in-
struction can still be executed which will result in a stack
overflow. Precautions should be taken to avoid such
cases which might cause unpredictable program
branching.
www.DataSheet4U.com
Mode
Program Counter Bits
b11 b10 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0
Initial Reset
000000000000
Analog Comparator Interrupt
000000000100
External Interrupt 0
000000001000
Multi-function Interrupt
000000001100
PWM Interrupt
000000010000
Timer/Event Counter 0 Overflow 0 0 0 0 0 0 0 1 0 1 0 0
Timer/Event Counter 1 Overflow 0 0 0 0 0 0 0 1 1 0 0 0
Skip
Program Counter + 2
Loading PCL
PC11 PC10 PC9 PC8 @7 @6 @5 @4 @3 @2 @1 @0
Jump, Call Branch
#11 #10 #9 #8 #7 #6 #5 #4 #3 #2 #1 #0
Return from Subroutine
S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0
Program Counter
Note: PC11~PC8: Current Program Counter bits
#11~#0: Instruction code address bits
@7~@0: PCL bits
S11~S0: Stack register bits
Rev. 1.00
11 December 16, 2009
11 Page | ||
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| PDF Descargar | [ Datasheet HT45FM03B.PDF ] | |
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