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9N50C Schematic ( PDF Datasheet ) - Fairchild Semiconductor

Teilenummer 9N50C
Beschreibung FQI9N50C
Hersteller Fairchild Semiconductor
Logo Fairchild Semiconductor Logo 




Gesamt 9 Seiten
9N50C Datasheet, Funktion
FQB9N50C/FQI9N50C
500V N-Channel MOSFET
QFET TM
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switched mode power supplies,
active power factor correction, electronic lamp ballasts
based on half bridge topology.
Features
• 9 A, 500V, RDS(on) = 0.8 @VGS = 10 V
• Low gate charge ( typical 28 nC)
• Low Crss ( typical 24 pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability
D
GS
D2-PAK
FQB Series
GDS
I2-PAK
FQI Series
D
!
"
!"
G!
"
"
!
S
Absolute Maximum Ratings TC = 25°C unless otherwise noted
Symbol
VDSS
ID
www.DataSheet4U.com
IDM
VGSS
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain-Source Voltage
Drain Current
- Continuous (TC = 25°C)
- Continuous (TC = 100°C)
Drain Current - Pulsed
(Note 1)
Gate-Source Voltage
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
(Note 3)
Power Dissipation (TC = 25°C)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
RθJA
RθJA
Parameter
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient *
Thermal Resistance, Junction-to-Ambient
FQB9N50C/FQI9N50C
500
9
5.4
36
± 30
360
9
13.5
4.5
135
1.07
-55 to +150
300
Typ Max
-- 0.93
-- 40
-- 62.5
Units
V
A
A
A
V
mJ
A
mJ
V/ns
W
W/°C
°C
°C
Units
°C/W
°C/W
°C/W
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003






9N50C Datasheet, Funktion
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
Same Type
as DUT
• dv/dt controlled by RG
• ISD controlled by pulse period
VDD
VGS
( Driver )
www.DataSheet4U.com
I SD
( DUT )
VDS
( DUT )
D
=
--G--a--t-e--P--u--l-s-e---W---i-d-t-h--
Gate Pulse Period
10V
IFM , Body Diode Forward Current
di/dt
IRM
Body Diode Reverse Current
Body Diode Recovery dv/dt
VSD
Body Diode
Forward Voltage Drop
VDD
©2003 Fairchild Semiconductor Corporation
Rev. A, August 2003

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