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YDA136 Schematic ( PDF Datasheet ) - YAMAHA CORPORATION

Teilenummer YDA136
Beschreibung STEREO 60W-100W DIGITAL AUDIO POWER AMPLIFIER CONTROLLER
Hersteller YAMAHA CORPORATION
Logo YAMAHA CORPORATION Logo 




Gesamt 30 Seiten
YDA136 Datasheet, Funktion
YDA136
D- 60
STEREO 60W-100W DIGITAL AUDIO POWER AMPLIFIER CONTROLLER
Outline
YDA136 (D-60) is a high efficient and high output digital audio power amplifier controller IC.
By combining a general purpose PowerMOSFET (hereafter called PowerMOSFET) which is connected with YDA136
and BTL, it is able to compose a high efficient audio power amplifier such as 60Wx2ch (Supplied voltage=32V, RL=6)
and 100Wx2ch (Supplied voltage=40V, RL=6).
YDA136 has 24bit 192kHz (max) DAC and 6 to -73dB1dB Stepof electron volumes in addition to a digital amplifier
controller, and supports a digital audio signal input. Furthermore, it also supports an analog audio signal input with DAC
bypasses.
YDA136 realizes a high-standing audio characteristic that is lower noise and distortion rate by performing an analog
feedback from PowerMOSFET output, and by using Yamaha’s unique modulation method.
YDA136 also equips a function (Over current detection function) which protects a circuit from a short of speaker output
terminal (after the LC filter) and a function (Supplied voltage detection function) which prevents a malfunction by
detecting a power supply falling.
Moreover, it has a function (Clock stop detection function) to protect a circuit by detecting a stop termination of PWM
carrier clock and a function (High-temperature detection function) to protect a circuit by detecting the unusual
high-temperature condition of it-self.
At last, by making three YDA136 to daisy-chain connection, the audio system of 6ch is easily realizable.
Features
High Output Power
100W (VBB=40V, RL=6)
60W (VBB=32V, RL=6)
www.DataSheeLt4oUw.cDomistortion Rate(THD+N)
0.05% (Po=50W, 1kHz, RL=6, at digital input)
0.03% (Po=50W, 1kHz, RL=6, at analog input)
High S/N Ratio
100dB (VBB=40V, A-filter, Gain=21.7+6dB, RL=6,
at digital input
Low Residual Noise
100µV (VBB=40V, Gain=21.7+6dB, at digital input)
70µV (VBB=40V, Gain=21.7+6dB, at analog input)
Channel Separation
80dB (1kHz, Po=50W)
Supports 24bit Digital input and Analog input
Built-in 6 to -73dB1dB Stepof electron volume
Multi-channel synchronous operation by switching
Master/Slave function.
Protect reset function
Hard mute function
Monophonic function
Unusual operation detection protection function
(Over current, Supplied voltage, Speaker terminal
short, Clock stop, Heat
Pop noise rejection function at the time of
power-up
100 pin plastic SQFP
Pin lead plating with Pd-free (YDA136-SZ)
YDA136 CATALOG
CATALOG No.:LSI-4DA136A20
2005.4






YDA136 Datasheet, Funktion
YDA136
Description of Block Functions
Stores the digital audio signal into DAC data register through a DAC interface.
Inputs into DAC through an over-sampling filter, and converts into an analog signal.
Performs a DC cut to DAC output data with the exterior capacitor of IC.
Performs a volume control and Differential signal conversion.
Performs a pulse width modulation
Negative feedbacks from the output of an external PowerMOSFET buffer.
Performs an Off-time delay control, and drives an external PowerMOSFET(Pch, Nch).
High current digital pulse signal is output from external PowerMOSFET (Pch, Nch)
The digital pulse signal is converted into audio signals by external LC filter and transmitted to speaker.
Stores the 7-bit volume data and control data into volume register and control register respectively through a MPU
interface.
Operation control circuit and protect circuit
Master clock generation circuit and carrier clock generation circuit
Supply of Power
YDA136 needs to be supplied the following two kinds of power supplies, the object for Low-Side drivers (Analog
Circuit), and the object for High-Side drivers, in addition to a power stage power supply (VBB, VSS).
Be sure to use VDD power for Low-Side driver and VBS for High-Side driver.
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YDA136 pdf, datenblatt
YDA136
Functional Explanation of Operations
Description of Registers
The volume register and the control register are allocated to address “0” and “1” in the register, respectively.
Each 14-bit register is mapped as follows.
Register Map
Address D13 D12 D11 D10 D9
D8
Bit
D7 D6
D5
D4
D3
D2
D1
D0
Volume Register
0
Control Register
1
R6…R0 Rch Volume Register
L6…L0 Lch Volume Register
ZERO Volume Zero-cross Function Selection Register
CF Carrier Clock Frequency Selection Register
OSFN Over Sampling Filter Function Selection Register
MOD2…0 DAC Input Format Selection Register
FS1…0 Over Sampling Mode Selection Register
T5…T0 (Reserved) Be held at “0.”
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