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PDF YDA135 Data sheet ( Hoja de datos )
| Número de pieza | YDA135 | |
| Descripción | STEREO 5W-20W DIGITAL AUDIO POWER AMPLIFIER CONTROLLER | |
| Fabricantes | YAMAHA CORPORATION | |
| Logotipo |  |
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YDA135
D-20
STEREO 5W-20W DIGITAL AUDIO POWER AMPLIFIER CONTROLLER
Outline
YDA135 is digital audio power amplifier controller IC that is output power of 20W/channel on a 12V power supply
operation.
This IC is combined with the general purpose Power MOSFET (hereafter called Power MOSFET) that are
connected through BTL can configure an audio power amplifier with output power of 5W or 20W.
This IC accepts analog signal, converts it into digital pulse signal by the digital modulation circuitry and outputs
the digital pulse signal for driving Power MOSFET. The Power MOSFET that is driven by this IC outputs large
current digital pulses. The digital pulse signal is converted to audio signal through an external low pass filter, and
sent to the speakers.
By using a general purpose Power MOSFET, very low cost digital amplifier system is configured. By adapting
Yamaha's proprietary modulation system, the device provides low distortion and high signal to noise ratio at the
highest level among digital amplifiers in the equiralent class.
This IC has the overcurrent detection function that detects overcurrent state by voltage drop of external resistors
that detects the output current.
This IC has the high temperature detection function that detects high temperature by resistor value change of
external element that detects temperature.
The operation of this IC is limited by using two control signal, SLEEP or MUTE. SLEEP signal stops all functions
of this IC, and restrain to the power consumption at the minimum. MUTE signal brings Power MOSFET into
nonconductive state, and mute the output of the device.
This IC is configured by two power supply ; 5V for signal processing circuits, and 12V for Power MOSFET driving
circuits.
Features
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・High
output
power
20W
＠
VDDP=12.0V
RL=4Ω
THD+N<10%
・High
efficiency
operation
80
%
＠
VDDP=12.0V
RL=4Ω
Po=20W
85
%
＠
VDDP=12.0V
RL=8Ω
Po=10W
・Low
distortion(THD+N)
0.03
%
＠
1kHz
RL=4Ω
Po=7W
・High
signal
to
noise
ratio
100
dB
＠
VDDP=12.0V
Input
sensitivity1.0V
RL=4Ω
97
dB
＠
VDDP=12.0V
Input
sensitivity150mV
RL=4Ω
・Low
consumption
current
(12V/5V
power
supply)
When
Power
MOSFET
(FW332)
is
connected.
30mA
/7mA
＠
VDDP=12.0V
no
signal
0.1mA/7mA
＠
VDDP=12.0V
at
mute
1μA/1μA
＠
VDDP=12.0V
at
sleep
・CS(Channel
separation)
80
dB
＠
1kHz
・Any
gain
setting
by
external
resistors
・Sleep
function
by
SLEEP
terminal
・Output
mute
function
by
MUTE
terminal
・Over
current
detection
function
(Power
supply
short-circuiting,
Ground
short-
circuiting,
Load
short-circuiting)
・High
temperature
detection
function
・Pop
noise
suppression
function
at
turn-on
and
turn-off
・48-pin
plastic
LQFP
(YDA135-VZ)
YDA135CATALOG
CATALOG No.:LSI-4DA135A2
2003.3
1 page  
YDA135
Description of terminal function
In the following explanations, "L" level and "H" level of SLEEP and MUTE terminals mean "VIL" and "VIH"
respectively, and "L" level and "H" level of PROT terminal mean "VOL" and "VOH" respectively.
"L" level and "H" level of output terminals such as HP_L and HN_L terminals also mean "VHOL" and "VHOH"
respectively.
Power supply and ground terminals
VDDL, VSSL, VDDR, VSSR (Pin No.48, 3, 13, 10)
VDDL and VSSL terminals are 5.0V power supply terminal and ground terminal for left channel signal processing
circuit respectively. VDDR and VSSR terminals are 5.0V power supply terminal and ground terminal for right
channel signal processing circuit respectively.
Left and right channels are equipped independent power supply terminal and ground terminal, respectirely.
All the ground terminals are connected through IC board (low resistor), but the power supply terminals for left and
right channels are separated from each other.
PVDDL, PVSSL, PVDDR, PVSSR (Pin No.38, 36, 23, 25)
PVDDL and PVSSL are 12 V power supply and ground terminals for left channel Power MOSFET driving circuit
respectively.
PVDDR and PVSSR are 12 V power supply and ground terminals for right channel Power MOSFET driving circuit
respectively.
Left and right channels are equipped independent power supply terminal and ground terminal, respectirely.
All the ground terminals are connected through IC board (low resistor), but the power supply terminals for left and
right channels are separated from each other.
Analog terminals
INL, NFINL, INR, NFINR (Pin No.47, 46, 14, 15)
INL and NFINL are analog signal input and gain adjustment terminals for left channel.
INR and NFINR are analog signal input and gain adjustment terminals for right channel.
The terminals are connected respectively to the negative input terminal and output terminal of the first stage
inversion operational amplifiers.
The amplifier gain is set by connecting an input resistor and a feedback resistor to both terminals as shown the
"Example of application circuit".
The use of this inversion operational amplifier allows making a filter such as low band boost filter.
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VREFL, VREFR (Pin No.2, 11)
VREFL is the reference voltage output terminal for the left channel. It outputs 1/2 of 5V power supply terminal
(VDDL) voltage.
VREFR is the reference voltage output terminal for the right channel. It outputs 1/2 of 5V power supply terminal
(VDDR) voltage.
Connect a capacitor with capacitance necessary to stabilize the voltage. Refer to "Pop noise reduction functions".
NFPL, NFNL, NFPR, NFNR (Pin No.45, 44, 16, 17)
NFPL and NFNL are the digital amplifier feedback input terminals for left channel.
NFPR and NFNR are the digital amplifier feedback input terminals for right channel.
Connect the feedback signal of positive side and negative side of H-bridge configuration Power MOSFET output to
each terminal. At this time, as described in the "Example of application circuit", divide the voltage of feedback signal
with external resistor to prevent the maximum voltage from exceeding 5V and input to each terminal.
HP_L, HN_L, LP_L, LN_L, HP_R, HN_R, LP_R, LN_R (Pin No.34, 33, 31, 32, 27, 28, 30, 29)
HP_L, HN_L, LP_L and LN_L are Power MOSFET driving terminals for left channel.
HP_L is a driving output terminal for positive side P channel Power MOSFET (PMOS), HN_L is the one for positive
side N channel Power MOSFET (NMOS), LP_L is the one for negative side P channel Power MOSFET (PMOS),
and LN_L is the one for negative side N channel Power MOSFET (NMOS).
HP_R, HN_R, LP_R and LN_R are Power MOSFET driving terminals for right channel.
HP_R is a driving output terminal for positive side P channel Power MOSFET (PMOS), HN_R is the one for positive
side N channel Power MOSFET (NMOS), LP_R is the one for negative side P channel Power MOSFET (PMOS),
and LN_R is the one for negative side N channel Power MOSFET (NMOS).
5
5 Page 
YDA135
Overcurrent detection functions
The overcurrent detection is a function that determines that the overcurrent state has occurred and set PROT
terminal to "H" level, when the current flowing in the external Power MOSFET has become equal to or higher than
the specified value. (This IC does not internally perform processing that turns off Power MOSFET automatically in
such case.)
For the "Example of application circuit", the circuit related to the overcurrent detection function is as shown in the
following figure, "Overcurrent detection function block diagram".
Connect a current detection resistor (RS) between PMOS (source side) pin and power supply pin PVDD of Power
MOSFET, and between NMOS (source side) pin and PVSS pin. Connect PMOS (source side) pin and SENSEPL
pin through the low pass filter consisting of RSNS and CSNS, and NMOS (source side) and SENSENL pins as well.
To prevent erroneous detection of glitch noise that can occur at switching of Power MOSFET, be sure to use the
low pass filter consisting of RSNS and CSNS. Connect SENSEPR pin and SENSENR pin in the same way.
This IC recognizes an overcurrent state when the potential of SENSEPL pin or SENSEPR pin has decreased below
the overcurrent detection threshold voltage (VOCPP) for a certain period (TOCP), bringing PROT pin to "H" level.
When the potential of SENSENL pin or SENSENR pin has increased over the overcurrent detection threshold
voltage (VOCPN) for a certain period, it recognizes the overcurrent state, bringing PROT pin to "H" level. At this
time, set SLEEP pin of MUTE pin to "H" to force the Power MOSFET to OFF.
After this, inputting "H" level once to SLEEP or turning off the power supply and then on again can restore the
output of PROT pin to initial "L" state.
When it is not necessary to use the overcurrent detection function, connect SENSEPL pin and SENSEPR to PVDD,
and SENSENL pin and SENSENR pin to PVSS (to disable the function).
When in sleep mode (SLEEP pin = "H" level) or in mute mode (MUTE pin = "H" level), this IC sets the Power
MOSFET to OFF state, and thus, the overcurrent detection function of both L channel and R channel are stopped.
For this circuit, use the overcurrent detection resistor (RS) with low inductive component. The resistance is to be
determined based on the drain current rating (IDMAX: pulse current) and overcurrent threshold voltages (VOCPP,
VOCPN) according to the conditions described below.
RS ≧ VOCPN / IDMAX
YDA135
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Over
Current
Detection
PVDD
PVDD
VDDP-VOCPP
SENSEPL/
SENSEPR
CSNS
RSNS
PVDD
RS
PROT
QS
SR-FF
R
SLEEP
Power
on
Reset
Thermal Detection
Over
Current
Detection
Overcurrent detection function block diagram
HP_L/
HP_R
HN_L/
HN_R
LP_L/
LP_R
LN_L/
LN_R
SENSENL/
SENSENR
RSNS
VOCPN
PVSS
CSNS
PVSS
RS
PVSS
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet YDA135.PDF ] | |
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