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PDF STPMS2 Data sheet ( Hoja de datos )
| Número de pieza | STPMS2 | |
| Descripción | second-order sigma-delta modulator | |
| Fabricantes | ST Microelectronics | |
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STPMS2
Smart sensor II dual-channel 1-bit, 4 MHz,
second-order sigma-delta modulator with embedded PGLNA
Features
■ VCC supply range 3.2 V - 5.5 V
■ Two second-order sigma-delta (ΣΔ)
modulators
■ Programmable chopper-stabilized low noise
and low offset amplifier
■ Supports 50-60 Hz, EN 50470-1, EN 50470-3,
IEC 62053-21, IEC 62053-22 and IEC 62053-
23 standards specs for class 1, class 0.5 and
class 0.2 AC watt meters
■ STPM02H: less than 0.5% error over 1:10000
range
■ STPM02L: less than 0.5% error over 1:5000
range
■ Precision voltage reference: 1.23 V with
programmable TC (STPMS2L only)
■ Internal low drop regulator @ 3 V (typ.)
Applications
■ Power metering
■ Motor control
■ Industrial process control
■ Weight scales
■ Pressure transducers
QFN16 (4 x 4)
or multi-phase energy meters along with the
STPMC1 device, a digital signal processor
designed for energy measurement. This device
can be used in medium and high resolution
measurement applications where single or double
inputs must be monitored at the same time. The
STPMS2 are mixed signal ICs consisting of an
analog and digital section. The analog section
consists of a programmable gain, low noise
choppered amplifier, two second-order ΔΣ
modulator blocks, a band-gap voltage reference,
a low-drop voltage regulator and DC buffers, while
the digital section consists of a clock generator
and output multiplexer.
Description
The STPMS2, also called “smart sensor” devices,
are ASSPs designed for effective measurement in
power line systems utilizing Rogowski coil, current
transformer, Hall or shunt sensors. These devices
are designed as building blocks for single-phase
Table 1. Device summary
Order codes
Package
STPMS2H-PUR
STPMS2L-PUR
QFN16 (4 x 4 mm)
QFN16 (4 x 4 mm)
Packaging
4500 parts per reel
4500 parts per reel
October 2011
Doc ID 16525 Rev 3
1/33
www.st.com
33
1 page  
STPMS2
3 Pin configuration
Figure 2. Pin connections
Pin configuration
16 15 14 13
VCC
1
12 MS2
VDDac 2
VDDa 3
VBG
4
GND
11 MS1
10 MS0
9 VDDav
56 7 8
AM09382v1
Table 2.
Pin n°
Pin description
Symbol
Description
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Exp PAD
VCC
VDDac
VDDa
VBG
CIN
CIP
VIN
VIP
VDDav
MS0
MS1
MS2
MS3
CLK
DAT
DATn
GND
Unregulated supply voltage for pad-ring, bandgap, low-drop and level shifters
Current channel modulator supply input
Output of internal + 3.0 V low drop regulated power supply
Output of internal + 1.23 V bias generator (STPMS2L);
Input of external precision reference voltage (STPMS2H)
Current channel -
Current channel +
Voltage channel -
Voltage channel +
Voltage channel modulator supply input
Input for configurator 0
Input for configurator 1
Input for configurator 2
Input for configurator 3
Input for external measurement clock
Output of multiplexed ΣΔ signal
Output of current ΣΔ signal
Output of inverted multiplexed ΣΔ signal
Output of voltage ΣΔ signal
Ground level for signals and pin protection
Doc ID 16525 Rev 3
5/33
5 Page 
STPMS2
5 Application
Application
The choice of external components in the transduction section of the application is a crucial
point in the application design, affecting the precision and the resolution of the entire
system.
Among the several considerations, a compromise should be found between the following
requirements:
1. Maximize the signal-to-noise ratio in the voltage and current channel
2. Choose the current-to-voltage conversion ratio Ks and the voltage divider ratio in a way
that calibration can be achieved
3. Choose Ks to take advantage of the whole current dynamic range in accordance with
desired maximum current and resolution.
To maximize the signal-to-noise ratio of the current channel, the voltage divider resistors
ratio should be as close as possible to those shown in Table 6.
Figure 4 below provides a reference application schematic diagram:
● P = 64000 imp/kWh
● INOM = 5 A
● IMAX = 60 A
Typical sensitivity values for the current sensors are indicated inTable 6.
Figure 4. Detailed application schematic
LN
VC C
C14 C5
C6
L3 E4622_X503
R7 1K1%
R6
3.3 1%
R8 1K1%
C7
4.7n
C8
4.7n
VN
R5
C3
470 1%
VL
R3 150k
10n
R2 150k
R4 150k
L1 1µ
1µ
4
5
c in
6 cip
7 vin
8 vip
1µ 1µ
3 2 1 17 18
U1
STPMS2 H /L
19
e3 20
e4
16
D ATn
DAT 15
D AT
14
CLK
CLK
MS3 13
9 10 11 12
C9
MS0 = CLK HP Ampl x4
CLK MS1 = 0 TC = 50 ppm/rC
1µ MS2 = 0 Voltage channel ON, DAT =(CLK)? bsV : bsC
MS3 = 0 HardMode, BIST Mode OFF
LOAD
AM09379v1
Doc ID 16525 Rev 3
11/33
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet STPMS2.PDF ] | |
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