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PDF ADF4350 Data sheet ( Hoja de datos )
| Número de pieza | ADF4350 | |
| Descripción | Wideband Synthesizer | |
| Fabricantes | Analog Devices | |
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Data Sheet
Wideband Synthesizer with Integrated VCO
ADF4350
FEATURES
GENERAL DESCRIPTION
Output frequency range: 137.5 MHz to 4400 MHz
The ADF4350 allows implementation of fractional-N or
Fractional-N synthesizer and integer-N synthesizer
integer-N phase-locked loop (PLL) frequency synthesizers
Low phase noise VCO
if used with an external loop filter and external reference
Programmable divide-by-1/-2/-4/-8/-16 output
frequency.
Typical rms jitter: <0.4 ps rms
Power supply: 3.0 V to 3.6 V
Logic compatibility: 1.8 V
Programmable dual-modulus prescaler of 4/5 or 8/9
Programmable output power level
RF output mute function
3-wire serial interface
Analog and digital lock detect
Switched bandwidth fast-lock mode
Cycle slip reduction
APPLICATIONS
The ADF4350 has an integrated voltage controlled oscillator
(VCO) with a fundamental output frequency ranging from
2200 MHz to 4400 MHz. In addition, divide-by-1/2/4/8 or 16
circuits allow the user to generate RF output frequencies as low
as 137.5 MHz. For applications that require isolation, the RF
output stage can be muted. The mute function is both pin- and
software-controllable. An auxiliary RF output is also available,
which can be powered down if not in use.
Control of all the on-chip registers is through a simple 3-wire
interface. The device operates with a power supply ranging
from 3.0 V to 3.6 V and can be powered down when not in use.
Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX,
GSM, PCS, DCS, DECT)
Test equipment
Wireless LANs, CATV equipment
Clock generation
FUNCTIONAL BLOCK DIAGRAM
SDVDD
AVDD
DVDD
VP RSET VVCO
REFIN
CLK
DATA
LE
×2
DOUBLER
10-BIT R
COUNTER
÷2
DIVIDER
DATA REGISTER
FUNCTION
LATCH
INTEGER FRACTION MODULUS
REG
REG
REG
THIRD-ORDER
FRACTIONAL
INTERPOLATOR
N COUNTER
LOCK
DETECT
MULTIPLEXER
CHARGE
PUMP
PHASE
COMPARATOR
VCO
CORE
FLO SWITCH
÷1/2/4/8/16
OUTPUT
STAGE
OUTPUT
STAGE
MUXOUT
SW
LD
CPOUT
VTUNE
VREF
VCOM
TEMP
RFOUTA+
RFOUTA–
PDBRF
RFOUTB+
RFOUTB–
CE AGND
DGND
CPGND
Figure 1.
MULTIPLEXER
SDGND AGNDVCO
ADF4350
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
ADF4350
Data Sheet
Parameter
NOISE CHARACTERISTICS
VCO Phase-Noise Performance6
Min
Normalized Phase Noise Floor (PNSYNTH)7
Normalized 1/f Noise (PN1_f)8
In-Band Phase Noise9
Integrated RMS Jitter10
Spurious Signals Due to PFD Frequency
Level of Signal With RF Mute Enabled
B Version
Typ
−89
−114
−134
−148
−86
−111
−134
−145
−83
−110
−132
−145
−220
−111
−97
0.5
−70
−40
Max Unit
Test Conditions/Comments
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps
dBc
dBm
10 kHz offset from 2.2 GHz carrier
100 kHz offset from 2.2 GHz carrier
1 MHz offset from 2.2 GHz carrier
5 MHz offset from 2.2 GHz carrier
10 kHz offset from 3.3 GHz carrier
100 kHz offset from 3.3 GHz carrier
1 MHz offset from 3.3 GHz carrier
5 MHz offset from 3.3 GHz carrier
10 kHz offset from 4.4 GHz carrier
100 kHz offset from 4.4 GHz carrier
1 MHz offset from 4.4 GHz carrier
5 MHz offset from 4.4 GHz carrier
PLL Loop BW = 500 kHz
10 kHz offset; normalized to 1 GHz
3 kHz offset from 2113.5 MHz carrier
1 AC coupling ensures AVDD/2 bias.
2 Guaranteed by design. Sample tested to ensure compliance.
3 ICP is internally modified to maintain constant loop gain over the frequency range.
4 TA = 25°C; AVDD = DVDD = VVCO = 3.3 V; prescaler = 8/9; fREFIN = 100 MHz; fPFD = 25 MHz; fRF = 4.4 GHz.
5 Using 50 Ω resistors to VVCO, into a 50 Ω load. Power measured with auxiliary RF output disabled. The current consumption of the auxiliary output is the same as for the
main output.
6 The noise of the VCO is measured in open-loop conditions.
7 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO and subtracting 20 log N (where N is the N divider
value) and 10 log FPFD. PNSYNTH = PNTOT − 10 log FPFD − 20 log N.
8 The PLL phase noise is composed of 1/f (flicker) noise plus the normalized PLL noise floor. The formula for calculating the 1/f noise contribution at an RF frequency, fRF,
and at a frequency offset f is given by PN = P1_f + 10log(10 kHz/f) + 20log(fRF/1 GHz). Both the normalized phase noise floor and flicker noise are modeled in ADIsimPLL.
9 fREFIN = 100 MHz; fPFD = 25 MHz; offset frequency = 10 kHz; VCO frequency = 4227 MHz, output divide by two enabled. RFOUT = 2113.5 MHz; N = 169; loop BW = 40 kHz,
ICP = 313 µA; low noise mode. The noise was measured with an EVAL-ADF4350EB1Z and the Agilent E5052A signal source analyzer.
10 fREFIN = 100 MHz; fPFD = 25 MHz; VCO frequency = 4400 MHz, RFOUT = 4400 MHz; N = 176; loop BW = 40 kHz, ICP = 313 µA; low noise mode. The noise was measured with
an EVAL-ADF4350EB1Z and the Agilent E5052A signal source analyzer.
Rev. B | Page 4 of 34
5 Page 
ADF4350
0
–20
–40
–60
–80
–100
–120
–140
–160
1k
10k 100k
1M
FREQUENCY (Hz)
10M
Figure 10. Integer-N Phase Noise and Spur Performance. GSM900 Band,
RFOUT = 904 MHz, REFIN = 100 MHz, PFD = 800 kHz, Output Divide-by-4
Selected; Loop-Filter Bandwidth = 16 kHz, Channel Spacing = 200 kHz.
0
–20
–40
–60
–80
–100
–120
–140
–160
1k
10k 100k
1M
FREQUENCY (Hz)
10M
Figure 11. Fractional-N Spur Performance; Low Noise Mode. W-CDMA Band,
RFOUT = 2113.5 MHz, REFIN = 100 MHz, PFD = 25 MHz, Output Divide-by-2
Selected; Loop Filter Bandwidth = 40 kHz, Channel Spacing = 200 kHz.
0
–20
–40
–60
–80
–100
–120
–140
–160
1k
10k 100k
1M
FREQUENCY (Hz)
10M
Figure 12. Fractional-N Spur Performance. Low Spur Mode, W-CDMA Band
RFOUT = 2113.5 MHz, REFIN = 100 MHz, PFD = 25 MHz, Output Divide-by-2
Selected; Loop Filter Bandwidth = 40 kHz, Channel Spacing = 200 kHz
Data Sheet
0
–20
–40
–60
–80
–100
–120
–140
–160
1k
10k 100k 1M
FREQUENCY (Hz)
10M
Figure 13. Fractional-N Spur Performance. Low Noise Mode, RFOUT =
2.591 GHz, REFIN = 105 MHz, PFD = 17.5 MHz, Output Divide-by-1 Selected;
Loop Filter Bandwidth = 20 kHz, Channel Spacing = 100 kHz.
0
–20
–40
–60
–80
–100
–120
–140
–160
1k
10k 100k 1M
FREQUENCY (Hz)
10M
Figure 14. Fractional-N Spur Performance. Low Spur Mode RFOUT =
2.591 GHz, REFIN = 105 MHz, PFD = 17.5 MHz, Output Divide-by-1 Selected.
Loop Filter Bandwidth = 20 kHz, Channel Spacing = 100 kHz (Note That
Fractional Spurs Are Removed and Only the Integer Boundary Spur Remains
in Low Spur Mode).
3.02
CSR OFF
3.01 CSR ON
3.00
2.99
2.98
2.97
2.96
2.95
0
100 200 300 400 500 600
TIME (µs)
Figure 15. Lock Time for 100 MHz Jump from 3070 MHz to 2970 MHz with
CSR On and Of f, PFD = 25 MHz, ICP = 313 µA, Loop Filter Bandwidth = 20 kHz
Rev. B | Page 10 of 34
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADF4350.PDF ] | |
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