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AD5412 Schematic ( PDF Datasheet ) - Analog Devices

Teilenummer AD5412
Beschreibung (AD5412 / AD5422) Current Source & Voltage Output DAC
Hersteller Analog Devices
Logo Analog Devices Logo 




Gesamt 30 Seiten
AD5412 Datasheet, Funktion
Data Sheet
Single Channel, 12-/16-Bit, Serial Input, Current
Source and Voltage Output DACs, HART Connectivity
AD5412/AD5422
FEATURES
12-/16-bit resolution and monotonicity
Current output ranges: 4 mA to 20 mA, 0 mA to 20 mA, or
0 mA to 24 mA
±0.01% FSR typical total unadjusted error (TUE)
±3 ppm FSR/°C output drift
Voltage output ranges: 0 V to 5 V, 0 V to 10 V, ±5 V, or ±10 V
10% overrange
±0.01% FSR typical TUE
±2 ppm FSR/°C output drift
Flexible serial digital interface
On-chip output fault detection
On-chip reference: 10 ppm/°C maximum
Optional regulated DVCC output
Asynchronous clear function
Power supply range
AVDD: 10.8 V to 40 V
AVSS: −26.4 V to −3 V/0 V
Current loop compliance voltage: AVDD – 2.5 V
Temperature range: −40°C to +105°C
TSSOP and LFCSP packages
APPLICATIONS
Process controls
Actuator controls
PLC
HART network connectivity (LFCSP package only)
GENERAL DESCRIPTION
The AD5412/AD5422 are low cost, precision, fully integrated
12-/16-bit digital-to-analog converters (DAC) offering a pro-
grammable current source and programmable voltage output
designed to meet the requirements of industrial process control
applications.
The output current range is programmable at 4 mA to 20 mA,
0 mA to 20 mA, or an overrange function of 0 mA to 24 mA.
The LFCSP version of this product has a CAP2 pin so that the
HART signals can be coupled onto the current output of the
AD5412/AD5422.
Voltage output is provided from a separate pin that can be
configured to provide 0 V to 5 V, 0 V to 10 V, ±5 V, or ±10 V
output ranges; an overrange of 10% is available on all ranges.
Analog outputs are short and open-circuit protected and can
drive capacitive loads of 1 µF.
The device operates with an AVDD power supply range from 10.8 V
to 40 V. Current loop compliance voltage is 0 V to AVDD − 2.5 V.
The flexible serial interface is SPI- and MICROWIRE™-compatible
and can be operated in 3-wire mode to minimize the digital
isolation required in isolated applications.
The device also includes a power-on-reset function, ensuring
that the device powers up in a known state. The part also includes
an asynchronous clear pin (CLEAR) that sets the outputs to
zero-scale/midscale voltage output or the low end of the
selected current range.
The total output error is typically ±0.01% in current mode and
±0.01% in voltage mode.
Table 1. Pin-Compatible Devices
Part No. Description
AD5410 Single channel, 12-bit, serial input current source DAC
AD5420 Single channel, 16-bit, serial input current source DAC
COMPANION PRODUCTS
HART Modem: AD5700, AD5700-1
Rev. M
Document Feedback
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com






AD5412 Datasheet, Funktion
AD5412/AD5422
Parameter1
OUTPUT CHARACTERISTICS3
Headroom
Output Voltage Drift vs. Time
Short-Circuit Current
Load
Capacitive Load Stability
RLOAD = ∞
RLOAD = 1 kΩ
RLOAD = ∞
DC Output Impedance
Power-On Time
DC PSRR
CURRENT OUTPUT
Output Current Ranges
Accuracy (Internal RSET)
Resolution
TUE
B Version
A Version
INL4
DNL
Offset Error
Offset Error TC3
Gain Error
Gain TC3
Full-Scale Error
Full-Scale TC3
Data Sheet
Min
1
0
0
4
16
12
−0.3
−0.13
−0.5
−0.3
−0.024
−0.032
−1
−1
−0.27
−0.40
−0.12
−0.18
−0.20
−0.03
−0.22
−0.24
−0.06
−0.2
−0.40
−0.1
Typ Max
0.5 0.8
90
20
20
5
1
0.3
10
90 130
3 12
24
20
20
±0.08
±0.15
±0.08
±16
±28
±0.006
±0.006
±10
±21
±0.08
±6
±13
+0.3
+0.13
+0.5
+0.3
+0.024
+0.032
+1
+1.3
+0.27
+0.40
+0.12
+0.18
+0.20
+0.03
+0.22
+0.24
+0.06
+0.2
+0.40
+0.1
Unit Test Conditions/Comments
V
ppm FSR
mA
kΩ
nF
nF
µF
µs
µV/V
µV/V
Output unloaded
Drift after 1000 hours, TA = 125°C
TA = 25°C
External compensation capacitor of 4 nF
connected
Output unloaded
mA
mA
mA
Bits AD5422
Bits AD5412
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
LSB
LSB
% FSR
% FSR
% FSR
ppm FSR/°C
ppm FSR/°C
% FSR
% FSR
% FSR
% FSR
% FSR
% FSR
ppm FSR/°C
ppm FSR/°C
% FSR
% FSR
% FSR
ppm FSR/°C
ppm FSR/°C
TA = 25°C
TA = −40°C to +85°C
TA = 25°C
AD5422
AD5412
TA = −40°C to +85°C, guaranteed monotonic
Guaranteed monotonic
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
TA = −40°C to +85°C, AD5422
AD5422
AD5422, TA = 25°C
TA = −40°C to +85°C, AD5412
AD5412
AD5412, TA = 25°C
TA = −40°C to +85°C
TA = −40°C to +85°C
TA = 25°C
TA = −40°C to +85°C
Rev. M | Page 6 of 44

6 Page









AD5412 pdf, datenblatt
AD5412/AD5422
Data Sheet
SCLK
12
t12
t11
t13
24
t14
t15
12
89
22 23 24
LATCH
SDIN
t16
DB23
t17
SDO
INPUT WORD SPECIFIES
REGISTER TO BE READ
UNDEFINED DATA
t18
DB0
DB23
XX
NOP CONDITION
X X DB15
DB0
t19
DB0
FIRST 8 BITS ARE
DON’T CARE BITS
Figure 3. Readback Mode Timing Diagram
SELECTED REGISTER
DATA CLOCKED OUT
t20
SCLK
LATCH
SDIN
SDO
12
24 25 26
t22
t21
t23
48
t24
t25
DB23
INPUT WORD FOR DAC N
DB0
t29
t26
DB23
t27
INPUT WORD FOR DAC N – 1
DB23
DB0 DB23
UNDEFINED
INPUT WORD FOR DAC N
Figure 4. Daisy-Chain Mode Timing Diagram
t28
DB0
DB0
t20
Rev. M | Page 12 of 44

12 Page





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