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LM25085A Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer LM25085A
Beschreibung 42V Constant On-Time PFET Buck Switching Controller
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 24 Seiten
LM25085A Datasheet, Funktion
www.DataSheet4U.com
LM25085A
March 16, 2009
42V Constant On-Time PFET Buck Switching Controller
with 0.9V Reference
General Description
The LM25085A is a functional variant of the LM25085 COT
PFET Buck Switching Controller. The functional differences
of the LM25085A are: The feedback reference voltage is
0.9V, the forced off-time after current limit detection is longer,
and the soft-start time is shorter (1.8 ms).
The LM25085A is a high efficiency PFET switching regulator
controller that can be used to quickly and easily develop a
small, efficient buck regulator for a wide range of applications.
This high voltage controller contains a PFET gate driver and
a high voltage bias regulator which operates over a wide 4.5V
to 42V input range. The constant on-time regulation principle
requires no loop compensation, simplifies circuit implemen-
tation, and results in ultra-fast load transient response. The
operating frequency remains nearly constant with line and
load variations due to the inverse relationship between the
input voltage and the on-time. The PFET architecture allows
100% duty cycle operation for a low dropout voltage. Either
the RDS(ON) of the PFET or an external sense resistor can be
used to sense current for over-current detection.
Features
Wide 4.5V to 42V input voltage range
Adjustable current limit using RDS(ON) or a current sense
resistor
Programmable switching frequency to 1MHz
No loop compensation required
Ultra-Fast transient response
Nearly constant operating frequency with line and load
variations
Adjustable output voltage from 0.9V
Precision ±2% feedback reference
Capable of 100% duty cycle operation
Internal soft-start timer
Integrated high voltage bias regulator
Thermal shutdown
Package
MSOP-8EP
MSOP-8
LLP-8 (3 mm x 3 mm)
Typical Application, Basic Step Down Controller
© 2009 National Semiconductor Corporation 300852
30085201
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LM25085A Datasheet, Funktion
www.DataShTeeyt4pU.iccomal Performance Characteristics
Unless otherwise specified the following conditions apply: TJ = 25°C, VIN = 24V.
Efficiency (Circuit of Figure 4)
Input Operating Current vs. VIN
Shutdown Current vs. VIN
30085205
VCC vs. VIN
30085206
VCC vs. ICC
30085207
On-Time vs. RT and VIN
30085208
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30085209
6
30085211

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LM25085A pdf, datenblatt
For VIN = 42V and tD = 100 ns, the simplified equation is:
www.DataSheet4U.com
SHUTDOWN
The LM25085A can be shutdown by grounding the RT pin
(see Figure 1). In this mode the PFET is held off, and the VCC
regulator is disabled. The internal operating current is re-
duced to the value shown in the graph “Shutdown current vs.
VIN”. The shutdown threshold at the RT pin is 0.73V, with
50 mV of hysteresis. Releasing the pin enables normal op-
eration. The RT pin must not be forced high during normal
operation.
When using equation 6 or 7, the tolerances for the ADJ pin
current sink and the offset of the current limit comparator
should be included to ensure the resulting minimum current
limit is not less than the required maximum switch current.
Simultaneously increasing the values of RADJ and RSEN de-
creases the effects of the current limit comparator offset, but
at the expense of higher power dissipation. When using a
sense resistor, the RSEN resistor value should be chosen with-
in the practical limitations of power dissipation and physical
size. For example, for a 10A current limit, setting RSEN =
0.005Ω results in a power dissipation as high as 0.5W. Cur-
rent sense connections to the RSEN resistor, or to Q1, must
be Kelvin connections to ensure accuracy.
The CADJ capacitor filters noise from the ADJ pin, and helps
prevent unintended switching of the current limit comparator
due to input voltage transients. The recommended value for
CADJ is 1000 pF.
CURRENT LIMIT OFF-TIME
When the current through Q1 exceeds the current limit thresh-
old, the LM25085A forces an off-time longer than the normal
off-time defined by Equation 1. See the graph “Off-Time vs.
VIN and VFB”, or calculate the current limit off-time from the
following equation:
30085224
FIGURE 1. Shutdown Implementation
CURRENT LIMITING
The LM25085A current limiting operates by sensing the volt-
age across either the RDS(ON) of Q1, or a sense resistor, during
the on-time and comparing it to the voltage across the resistor
RADJ (see Figure 2). The current limit function is much more
accurate and stable over temperature when a sense resistor
is used. The RDS(ON) of a MOSFET has a wide process vari-
ation and a large temperature coefficient.
If the voltage across RDS(ON) of Q1, or the sense resistor, is
greater than the voltage across RADJ, the current limit com-
parator switches to turn off Q1. Current sensing is disabled
for a blanking time of 100 ns at the beginning of the on-time
to prevent false triggering of the current limit comparator due
to leading edge current spikes. Because of the blanking time
and the turn-on and turn-off delays created by the PFET, the
on-time at the PGATE pin should not be set less than 150 ns.
An on-time shorter than that may prevent the current limit de-
tection circuit from properly detecting an over-current condi-
tion. The duration of the subsequent forced off-time is a
function of the input voltage and the voltage at the FB pin, as
shown in the graph “Off-time vs. VIN and VFB”. The longer-
than-normal forced off-time allows the inductor current to
decrease to a low level before the next on-time. This cycle-
by-cycle monitoring, followed by a forced off-time, provides
effective protection from output load faults over a wide range
of operating conditions.
The voltage across the RADJ resistor is set by an internal 40
µA current sink at the ADJ pin. When using Q1’s RDS(ON) for
sensing, the current at which the current limit comparator
switches is calculated from:
ICL = 40 µA x RADJ/RDS(ON)
(6)
When using a sense resistor (RSEN) the thrshold of the current
limit comparator is calculated from:
ICL = 40 µA x RADJ/RSEN
(7)
(8)
where VIN is the input voltage, and VFB is the voltage at the
FB pin at the time current limit was detected. This feature is
necessary to allow the inductor current to decrease sufficient-
ly to offset the current increase which occurred during the on-
time. During the on-time, the inductor current increases an
amount equal to:
(9)
During the off-time the inductor current decreases due to the
reverse voltage applied across the inductor by the output volt-
age, the freewheeling diode’s forward voltage (VFD), and the
voltage drop due to the inductor’s series resistance (VESR).
The current decrease is equal to:
(10)
The on-time in Equation 9 is shorter than the normal on-time
since the PFET is shut off when the current limit threshold is
crossed. If the off-time is not long enough, such that the cur-
rent decrease (Equation 10) is less than the current increase
(Equation 9), the current levels are higher at the start of the
next on-time. This results in a further decrease in on-time,
since the current limit threshold is crossed sooner. A balance
is reached when the current changes in Equations 9 and 10
are equal. The worst case situation is that of a direct short
circuit at the output terminals, where VOUT = 0 volts, as that
results in the largest current increase during the on-time, and
the smallest decrease during the off-time. The sum of the
diode’s forward voltage and the inductor’s ESR voltage must
be sufficient to ensure current runaway does not occur. Using
Equations 9 and 10, this requirement can be stated as:
(11)
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