|
|
PDF AD9272 Data sheet ( Hoja de datos )
| Número de pieza | AD9272 | |
| Descripción | Octal LNA/VGA/AAF/ADC and Crosspoint Switch | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AD9272 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
FEATURES
8 channels of LNA, VGA, AAF, and ADC
Low noise preamplifier (LNA)
Input-referred noise voltage = 0.75 nV/√Hz
(gain = 21.3 dB) @ 5 MHz typical
SPI-programmable gain = 15.6 dB/17.9 dB/21.3 dB
Single-ended input; VIN maximum = 733 mV p-p/
550 mV p-p/367 mV p-p
Dual-mode active input impedance matching
Bandwidth (BW) > 100 MHz
Full-scale (FS) output = 4.4 V p-p differential
Variable gain amplifier (VGA)
Attenuator range = −42 dB to 0 dB
SPI-programmable PGA gain = 21 dB/24 dB/27 dB/30 dB
Linear-in-dB gain control
Antialiasing filter (AAF)
Programmable 2nd-order low-pass filter (LPF) from
8 MHz to 18 MHz
Programmable high-pass filter (HPF)
Analog-to-digital converter (ADC)
12 bits at 10 MSPS to 80 MSPS
SNR = 70 dB
SFDR = 75 dB
Serial LVDS (ANSI-644, IEEE 1596.3 reduced range link)
Data and frame clock outputs
Includes an 8 × 8 differential crosspoint switch to support
continuous wave (CW) Doppler
Low power, 195 mW per channel at 12 bits/40 MSPS (TGC)
120 mW per channel in CW Doppler
Flexible power-down modes
Overload recovery in <10 ns
Fast recovery from low power standby mode, <2 μs
100-lead TQFP
APPLICATIONS
Medical imaging/ultrasound
Automotive radar
GENERAL DESCRIPTION
The AD9272 is designed for low cost, low power, small size, and
ease of use. It contains eight channels of a low noise preamplifier
(LNA) with a variable gain amplifier (VGA), an antialiasing
filter (AAF), and a 12-bit, 10 MSPS to 80 MSPS analog-to-
digital converter (ADC).
Each channel features a variable gain range of 42 dB, a fully
differential signal path, an active input preamplifier termination, a
maximum gain of up to 52 dB, and an ADC with a conversion
rate of up to 80 MSPS. The channel is optimized for dynamic
performance and low power in applications where a small
package size is critical.
Octal LNA/VGA/AAF/ADC
and Crosspoint Switch
AD9272
FUNCTIONAL BLOCK DIAGRAM
LOSW-A
LO-A
LI-A
LG-A
LNA
VGA
LOSW-B
LO-B
LI-B
LG-B LNA VGA
LOSW-C
LO-C
LI-C
LG-C LNA VGA
LOSW-D
LO-D
LI-D
LG-D
LNA
VGA
LOSW-E
LO-E
LI-E
LG-E
LNA
VGA
LOSW-F
LO-F
LI-F
LG-F LNA VGA
LOSW-G
LO-G
LI-G
LG-G
LNA
VGA
LOSW-H
LO-H
LI-H
LG-H LNA VGA
SWITCH
ARRAY
AD9272
AAF
12-BIT
ADC
SERIAL
LVDS
DOUTA+
DOUTA–
AAF
12-BIT
ADC
SERIAL
LVDS
DOUTB+
DOUTB–
AAF
12-BIT
ADC
SERIAL
LVDS
DOUTC+
DOUTC–
AAF
12-BIT
ADC
SERIAL
LVDS
DOUTD+
DOUTD–
AAF
12-BIT
ADC
SERIAL
LVDS
DOUTE+
DOUTE–
AAF
12-BIT
ADC
SERIAL
LVDS
DOUTF+
DOUTF–
AAF
12-BIT
ADC
SERIAL
LVDS
DOUTG+
DOUTG–
AAF
12-BIT
ADC
REFERENCE
SERIAL
LVDS
DOUTH+
DOUTH–
FCO+
FCO–
DCO+
DCO–
Figure 1.
The LNA has a single-ended-to-differential gain that is selectable
through the SPI. The LNA input-referred noise voltage is typically
0.75 nV/√Hz at a gain of 21.3 dB, and the combined input-referred
noise voltage of the entire channel is 0.85 nV/√Hz at maximum
gain. Assuming a 15 MHz noise bandwidth (NBW) and a 21.3 dB
LNA gain, the input SNR is about 92 dB. In CW Doppler mode,
the LNA output drives a transconductance amp that is switched
through an 8 × 8 differential crosspoint switch. The switch is
programmable through the SPI.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page  
AD9272
SPECIFICATIONS
AC SPECIFICATIONS
AVDD1 = 1.8 V, AVDD2 = 3.0 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, fIN = 5 MHz, RS = 50 Ω, LNA gain = 21.3 dB, LNA bias = high,
PGA gain = 27 dB, GAIN− = 0.8 V, AAF LPF cutoff = fSAMPLE/4.5, HPF = LPF cutoff/20.7 (default), full temperature, ANSI-644 LVDS mode,
unless otherwise noted.
Table 1.
Parameter 1
Conditions
AD9272-40
AD9272-65
AD9272-80
Min Typ
Max Min Typ
Max Min Typ
Max Unit
LNA CHARACTERISTICS
Gain
Single-ended
15.6/17.9/21.3
input to
differential output
15.6/17.9/21.3
15.6/17.9/21.3
dB
Single-ended
input to
single-ended
output
9.6/11.9/15.3
9.6/11.9/15.3
9.6/11.9/15.3
dB
Input Voltage Range
LNA gain =
15.6 dB/
17.9 dB/
21.3 dB,
LNA output
limited to
4.4 V p-p
differential output
733/550/367
733/550/367
733/550/367
mV p-p
SE 2
Input Common
Mode
0.9 0.9 0.9 V
Input Resistance
RFB = 250 Ω
50
50
50 Ω
RFB = 500 Ω
100
100
100 Ω
RFB = ∞
15
15
15 kΩ
Input Capacitance LI-x
22
22
22 pF
−3 dB Bandwidth
100 100 100 MHz
Input-Referred
Noise Voltage
Input Noise Current
1 dB Input Com-
pression Point
LNA gain =
15.6 dB/
17.9 dB/
21.3 dB,
RS = 0 Ω,
RFB = ∞
RFB = ∞
LNA gain =
15.6 dB/
17.9 dB/
21.3 dB,
GAIN+ = 0 V
0.98/0.86/0.75
1
1.0/0.8/0.5
0.98/0.86/0.75
1
1.0/0.8/0.5
0.98/0.86/0.75
nV/√Hz
1
1.0/0.8/0.5
pA/√Hz
mV p-p
Noise Figure
LNA gain =
15.6 dB/
17.9 dB/
21.3 dB
Active Termination
Matched
RS = 50 Ω,
RFB = 200 Ω/
250 Ω/350 Ω
4.8/4.1/3.2
4.8/4.1/3.2
4.8/4.0/3.2
dB
Unterminated RFB = ∞
3.4/2.8/2.3
3.4/2.8/2.3
3.4/2.8/2.3
dB
FULL-CHANNEL (TGC)
CHARACTERISTICS
AAF Low-Pass Filter −3 dB,
Cutoff -In Range programmable
8 to 18
8 to 18
8 to 18
MHz
AAF Low-Pass Filter
Cutoff - Out of
Range3
−3 dB,
programmable,
AAF Bandwidth
Tolerance
5 to 8 and
18 to 35
5 to 8 and
18 to 35
5 to 8 and
18 to 35
MHz
AAF Bandwidth
Tolerance -In
Range
±10 ±10 ±10 %
Rev. C | Page 4 of 44
5 Page 
AD9272
ADC Timing Diagrams
N–1
AIN
CLK–
CLK+
DCO–
DCO+
FCO–
FCO+
DOUTx–
DOUTx+
tEH
tCPD
tFCO
tPD
N–1
AIN
CLK–
CLK+
DCO–
DCO+
FCO–
FCO+
DOUTx–
DOUTx+
tEH
tCPD
tFCO
tPD
N
tEL
tFRAME
MSB
N–8
D10
N–8
D9
N–8
D8
N–8
tDATA
D7 D6
N–8 N–8
D5
N–8
D4
N–8
D3
N–8
D2 D1
N–8 N–8
D0 MSB D10
N–8 N–7 N–7
Figure 2. 12-Bit Data Serial Stream (Default)
N
tEL
tFRAME
tDATA
LSB D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 LSB D0
N–8 N–8 N–8 N–8 N–8 N–8 N–8 N–8 N–8 N–8 N–8 N–8 N–7 N–7
Figure 3. 12-Bit Data Serial Stream, LSB First
Rev. C | Page 10 of 44
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD9272.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AD9271 | Octal LAN/VGA/AAF/ADC and Crosspoint Switch | Analog Devices |
| AD9272 | Octal LNA/VGA/AAF/ADC and Crosspoint Switch | Analog Devices |
| AD9273 | Octal LNA/VGA/AAF/ADC and Crosspoint Switch | Analog Devices |
| AD9276 | Octal LNA/VGA/AAF/12-Bit ADC and CW I/Q Demodulator | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |