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STA2062 Schematic ( PDF Datasheet ) - STMicroelectronics

Teilenummer STA2062
Beschreibung Infotainment application processor
Hersteller STMicroelectronics
Logo STMicroelectronics Logo 




Gesamt 5 Seiten
STA2062 Datasheet, Funktion
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STA2062
Cartesio™
Infotainment application processor with embedded GPS
Data Brief
Features
High performance ARM926 MCU (up to 333MHz)
MCU memory organization
– Cache: 16KByte instruction, 16KByte data
– 8KByte instruction TCM (tightly coupled memory)
– 8KByte data TCM
– 32KByte embedded ROM for boot
– Two banks of 64KByte embedded SRAM
– 512Byte embedded SRAM for back-up
– 4GByte total linear address space
– Memory extension through:
Flexible static memory controller-FSMC
(NOR/NAND Flash, CF/CF+, ROM, SRAM
support)
Mobile DDR/SDRAM controller:
16bit data @166MHz, 2 Chip Select,
512Kbit each
Interrupt
– 64-channel interrupt controller (VIC)
– 16-vectorized interrupts with 16
programmable priority Level
DMA
– Two 8-channel double port system DMA
controllers
– 32 DMA request for each controller
– Two external DMA requests are supported
32 channel high performance GPS correlation
embedded subsystem
Eight 32-bit free running timers/counters
Four 16-bit extended function timer (EFT) with
input capture/output compare and PWM
Real time clock (RTC)
Pulse width light modulator (PWL)
32-bit watchdog timer
Four autobaud UART with 64X8 transmit and 64x12
receive FIFO with DMA and hardware flow control
One IrDA(SIR/MIR/FIR) interface
Three I2C multi-master/slave interfaces
Two synchronous serial port (SSP) with 32x32
separate transmit and receive FIFO with
Motorola-SPI, National-MicroWire and Texas-
SSI support modes
LFBGA361 (16x16x1.4mm)
Four multichannel serial ports (MSP) with 32x8
separate transmit and receive FIFO
Color LCD controller for STN,TFT or HR-TFT panels
USB 2.0 OTG high speed dual role controller
(ULPI interface)
USB full speed dual role controller with
integrated 1.1 physical layer transceiver
Two secure-digital multimedia memory card
Interface (SD/SDIO/MMC) up to 8 bit data
SPDIF input interface
C3 hardware Reed-Solomon decoder
Hardware sample rate converter (SaRaC)
Two controller area network (CAN)
Four 32-bit GPIO ports
JTAG based in-circuit emulator (ICE) with
embedded medium trace module
Typical working condition: Vdd: 1.2 ±10%V,
VIO: 1.8V
Overdrive: Vdd: 1.4 ±5%V, VIO: 1.8 ±10%V,
2.5 ±10%V
Bus frequency: 166 MHz (overdrive)
Bus/DDR frequency: 166 MHz
HCMOS 0.90µm process
Package:
– LFBGA16x16x1.4mm (19x19balls)
– 0.8mm ball pitch, (0.4mm ball)
– Full array
Ambient temperature range: -40 / +85°C
Table 1. Device summary
Order code
Package
STA2062
LFBGA361
Packing
Tray
October 2007
Rev 2
For further information contact your local STMicroelectronics sales office.
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