|
|
PDF AK8813 Data sheet ( Hoja de datos )
| Número de pieza | AK8813 | |
| Descripción | (AK8813 / AK8814) NTSC/PAL Digital Video Encoder | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AK8813 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
www.DataShAeSetA4UH.IcKomASEI
[AK8813/14]
AK8813/14
NTSC/PAL Digital Video Encoder
GENERAL DESCRIPTION
The AK8813/14 is low voltage, low power and small packaged Digital Video Encoder. It is suitable
for a STB or Digital TV. It converts ITU-R.BT601/656 standard 8- bit parallel data into analog
composite video signal, S-video in NTSC and PAL formats.
AK8813/14 supports Copy protection, Closed Captioning and Video Blanking ID(CGMS-A) and WSS.
These functions are controlled by high-speed I2C Bus interface.
FEATURES
• NTSC-M, PAL-B,D,G,H,I,M,N encoding.
• Simultaneous composite video signal and S-video signal outputs
• ITU-R BT.656 4:2:2 8-bit Parallel Input
- EAV Decoding
• Master/Slave Operation
- Digital Field Sync I/O
- Digital Vertical/Horizontal Sync I/O
• Y filtering
2 x over-sampling
• C filtering
4 x over-sampling
• Single 27MHz Clock (The polarity could be inverted by SYSINV pin)
• Triple 10-bit DACs
• I2C Bus Interface (400kHz)
• Closed Caption encoding (NTSC: line 21,284-SMPTE PAL: line 22,335-CCIR)
• Macrovision Copy Protection Rev. 7.1 * (only AK8814 )
• VBID, CGMS-A(EIAJ CPR-1024)
• WSS
• On-chip color bar generator
• Low power consumption
• 2.8V to 3.3V operation CMOS Monolithic
• 48pin LQFP Package / 57pin FBGA Package
(*Note) This device is protected by U.S. patent numbers 4,631,603, 4,577,216, and 4,819,098, and other
intellectual rights. The use of Macrovision’s copy protection technology in the device must be authorized
by Macrovision and is intended for home and other limited pay-per -view use only, unless otherwise
authorized in written by Macrovision. Reverse engineering or disassembly is prohibited.
Rev.00
- 1 - 2004/Oct
1 page  
www.DaAtaSSAheHeIt4KUA.cSoEmI
48pin LQFP
No. Pin Name
1 UD9
2-5,
8-11
D7 - D0
12-13 TEST
14 SELA
15 SCL
16 SDA
17 PD
18 /RESET
20 Y
22 C
24 COMPOSITE
27 VREFOUT
28 VREFIN
29 IREF
32-39
41
43
UD0-UD7
SYSCLK
UD8
45
FID
/VSYNC
46 HSYNC
48
21,26
6,31,
42,44
19,23,25
7,30,
40,47
SYSINV
AVDD
DVDD
AVSS
DVSS
PIN/FUNCTION
[AK8813/14]
I/O Description
I/O Test pin. Open for normal operation
27MHz 8-Bit 4:2:2 multiplexed Y,Cb,Cr Data Input.
I
For Rec.656 format, AK8813/14 decodes EAV.
For non-Rec.656 format (without EAV), AK8813/14 operates in Master or
Slave mode.
I Test pin. Ground for normal operation
I
The slave address is set with this pin.
“L”:40H “H”:42H
I Serial interface clock
I/O Serial interface data
I
Power Down Pin. After returning from PD mode to normal operation,
RESET Sequence should be done to AK8813/14.
After this pin becomes “L”, AK8813/14 starts the internal initializing
sequence.
I
After initializing sequence, AK8813/14 is set NTSC mode, Rec.656
decoding mode. All DACs Off condition.
After power up, AK8813/14 must be initialized with this pin.
(27MHz Clock is necessary for reset sequence.)
O Output of Luminance Signal.
O Output of the Chrominance signal
O Output of Composite Video signal
O Output of the Internal Vref. Terminate with 0.1uF or more capacitor.
I Input of the Reference Voltage
The currents flow this pin adjusts the full-scale output current of the DAC.
O Connect this pin to Analog ground via a 6.8kohm resistor ( better than +/-
1% accuracy ).
I/O Test pin. Open for normal operation
I 27MHz Clock Input. The polarity could be inverted by SYSINV.
I/O Test pin. Open for normal operation
Either of FID or VSYNC selected by the register.
Rec.656 decode mode :Output
I/O Master mode : Output
Slave mode : Input
FID shows that “L” is odd field and ”H” is even field.
Rec.656 decode mode : Output
I/O Master mode : Output
Slave mode : Input
I
“L “ : data is latched with rising edge.
“H” : data is latched with falling edge.
P Analog Power Supply
P Digital Power Supply
G Analog Ground
G Digital Ground
Rev.00
- 6 - 2004/Oct
5 Page 
www.DaAtaSSAheHeIt4KUA.cSoEmI
(3). Synchronizing Signal ( FID/VSYNC, HSYNC )
(3-1) SYSINV=Low
(3-1-1) Input Timing
SYSCLK
FID/VSYNC, HSYNC
tDS tDH
[AK8813/14]
VIH
VIL
Parameter
Data Setup Time
Data Hold Time
(3-1-2) Output Timing
SYSCLK
FID/VSYNC, HSYNC
Symbol Min Typ. Max Units
tDS 5
nsec
tDH 8
nsec
tDEL
VIH
Parameter
Delay from SYSCLK
Symbol Min Typ. Max Units
tDEL
27 nsec
Rev.00
- 12 -
2004/Oct
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AK8813.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AK8811 | NTSC/PAL Digital Video Encoder | Asahi Kasei Microsystems |
| AK8812 | NTSC/PAL Digital Video Encoder | Asahi Kasei Microsystems |
| AK8813 | (AK8813 / AK8814) NTSC/PAL Digital Video Encoder | Asahi Kasei Microsystems |
| AK8814 | (AK8813 / AK8814) NTSC/PAL Digital Video Encoder | Asahi Kasei Microsystems |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |