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PDF KK4021B Data sheet ( Hoja de datos )
| Número de pieza | KK4021B | |
| Descripción | 8-Bit Shift Register High-Voltage Silicon-Gate CMOS | |
| Fabricantes | KODENSHI KOREA | |
| Logotipo |  |
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TECHNICAL DATA
KK4021B
8-Bit Shift Register
High-Voltage Silicon-Gate CMOS
The KK4021B is an Edge-Triggered 8-Bit Shift Register (Parallel-to-
Serial Converter) with a synchronous Serial Data Input (DS), a Clock
Input (CP), an asynchronous active HIGH Parallel Load Input (PL), eight
asynchronous Parallel Data Inputs (P0-P7) and Buffered Parallel Outputs
from the last three stages (Q5-Q7).
Information on the Parallel Data Inputs (P0-P7) is asynchronously
loaded into the register while the Parallel Load Input (PL) is HIGH,
independent of the Clock (CP) and Serial Data (DS) inputs. Data present
in the register is stored on the HIGH-to-LOW transition of the Parallel
Load Input (PL).
When the Parallel Load Input is LOW, data on the Serial Data Input
(DS) is shifted into the first register position and all the data in the register
is shifted one position to the right on the LOW-to-HIGH transition of the
Clock Input (CP).
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
KK4021BN Plastic
KK4021BDW SOIC
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =VCC
PIN 8 = GND
FUNCTION TABLE
SERIAL OPERATION:
t CP DS PL
n 00
n+1 1 0
n+2 0 0
n+3 1 0
X0
Q5
t=n+6
0
1
0
1
Q5
Q6
t=n+7
0
1
0
Q6
Q7
t=n+8
0
1
Q7
PARALLEL OPERATION:
CP DS PL P5 P6 P7 Q5 Q6 Q7
X X 1 DDDDDD
X = don’t care
D = 1 or 0
1
1 page  
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KK4021B
N SUFFIX PLASTIC
(MS - 001BB)
A
16 9
B
18
FL
C
-T- SEATING
PLANE
N
G KM
D
0.25 (0.010) M T
J
H
NOTES:
1. imensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
Symbol
A
B
C
D
F
G
H
J
K
L
M
N
Dimensions, mm
MIN
MAX
18.67
19.69
6.10 7.11
5.33
0.36 0.56
1.14 1.78
2.54
7.62
0° 10°
2.92 3.81
7.62 8.26
0.20 0.36
0.38
D SUFFIX SOIC
(MS - 012AC)
A
16 9
H BP
1G
8
C
-T-
D
SEATING
K PLANE
J
0.25 (0.010) M T C M
R x 45
F
M
NOTES:
1.Dimensions A and B do not include mold flash or protrusion.
2.Maximum mold flash or protrusion 0.15 mm (0.006) per side for A, for
B - 0.25 mm (0.010) per side.
Dimensions, mm
Symbol. MIN MAX
A 9.80 10.0
B 3.80 4.00
C 1.35 1.75
D 0.33 0.51
F 0.40 1.27
G 1.27
H 5.72
J 0° 8°
K 0.10 0.25
M 0.19 0.25
P 5.80 6.20
R 0.25 0.50
5
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| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet KK4021B.PDF ] | |
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