PDF ADV7604 Data sheet ( Hoja de datos )

Número de pieza	ADV7604
Descripción	Video and Graphics Digitizer
Fabricantes	Analog Devices
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Data Sheet 12-Bit, 170 MHz, Video and Graphics Digitizer with Quad HDMI Receiver ADV7604 FEATURES Three 12-bit ADCs ADC sampling rates up to 170 MHz 12-channel analog input mux 525i/625i component analog input 525p/625p component progressive scan support 720p/1080i/1080p/1250i component HDTV support Digitizes RGB graphics up to 1600 × 1200 at 60 Hz (UXGA) VBI data slicer (including teletext) Simultaneous HDMI and analog video sync processing Ultralow jitter digital PLL 4:1 multiplexed HDMI receiver HDMI 1.3a support 36-/30-/24-bit deep color support Flexible audio interface (DSD, DST, Dolby® TrueHD, DTS®-HD master audio, and DTS-HD high resolution audio) 225 MHz HDMI receiver Repeater support High-bandwidth digital content protection (HDCP 1.3) Programmable/adaptive equalizer for cable lengths up to 30 meters Internal EDID RAM EDID with HDMI cable power support CEC support General S/PDIF (IEC90658-compatible) digital audio output Highly flexible output interface 12-bit 4:4:4/8-bit 4:2:2 DDR pixel output interface Dual STDI function support standard identification 2 any-to-any 3 × 3 color space conversion matrices 2 programmable interrupt request output pins Advanced sync processing for robust sync extraction of poor video sources AV.Link support APPLICATIONS Advanced TV PDP HDTVs LCD TVs (HDTV ready) LCD/DLP® rear projection HDTVs CRT HDTVs LCoS™ HDTVs AVR video receivers LCD/DLP front projectors HDTV STBs with PVR CRT HDTVs DVD recorders with progressive scan input support GENERAL DESCRIPTION The ADV7604 is a high quality, single chip, multiformat video decoder, graphics digitizer with an integrated 4:1 multiplexed High-Definition Multimedia Interface (HDMI®) receiver. The ADV7604 contains one main componentprocessor (CP) that processesYPrPb and RGB component formats, including RGB graphics. The CP also processesthe video signals from the HDMI receiver. The ADV7604 can operate in quad HDMI and analog input mode, thus providing simultaneousHDMI and analog video sync processing. This allows for fast switching between HDMI and the ADCs. The ADV7604 supports the decoding of a component RGB/ YPrPb video signal into a digital YCrCb or RGB pixel output stream. The support for componentvideo includes 525i, 625i, 525p, 625p, 720p, 1080i, 1080p, and 1250i standards as well as many other HD and SMPTE standards. Graphics digitization is also supported bythe ADV7604. The ADV7604 is capable of digitizing RGB graphics signals from VGA to UXGA rates and converting them into a digital RGB or YCrCb pixel output stream. The ADV7604 incorporatesa quad input HDMI-compatible receiver that supportsall HDTV formats upto 1080panddisplay resolutions up to UXGA (1600 × 1200 at 60 Hz). The reception of encrypted video is possible with the inclusion of HDCP. The HDMI receiver also includes programmable/adaptive equaliza- tion that ensures robustoperation of the interface with cable lengths up to 30 meters. The HDMI receiver hasadvanced audio functionality, such as a mute controller thatprevents audible extraneousnoise in the audio output. Fabricated in an advanced CMOS process,the ADV7604 is provided in a space-saving, 260-ball 15 mm × 15 mm BGA surface-mount, RoHS-compliant package and is specified over the −40°C to +70°C temperature range. Rev. D Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks andregistered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com 1 page ADV7604 Data Sheet SPECIFICATIONS AVDD = 1.8 V ± 5%, DVDD = 1.8 V ± 5%, DVDDIO = 3.3 V ± 5%, PVDD = 1.8 V ± 5%, TVDD = 3.3 V ± 5%, CVDD = 1.8 V ± 5%, TMIN to TMAX = −40°C to +70°C. ANALOG, DIGITAL, HDMI, AND AC SPECIFICATIONS Table 1. Parameter ANALOG Clamp Circuitry External Clamp Capacitor Input Impedance ADC Midscale (CML) ADC Full-Scale Level ADC Zero-Scale Level ADC Dynamic Range Clamp Level (When Locked) DIGITAL INPUTS Input High Voltage (VIH) Input Low Voltage (VIL) Input Current (IIN) Input Capacitance (CIN) DIGITAL INPUTS (5 V TOLERANT)1 Input High Voltage (VIH) Input Low Voltage (VIL) Input Current (IIN) DIGITAL OUTPUTS Output High Voltage (VOH) Output Low Voltage (VOL) High Impedance Leakage Current (ILEAK) Output Capacitance (COUT) HDMI TMDS Differential Pin Capacitance AC SPECIFICATIONS Intrapair (+ to −) Differential Input Skew for TMDS Clock Rates up to 222.75 MHz Intrapair (+ to −) Differential Input Skew for TMDS Clock Rates Above 222.75 MHz Channel-to-ChannelDifferentialInput Skew Test Conditions/Comments Min Typ Clamps switched off Component input (Y signal) Component input (Pr signal) Component input (Pb signal) PC RGB input (R, G, B) 2 RESET pin Other digital inputs −60 −10 100 10 0.89 CML + 0.550 CML − 0.550 1.1 CML − 0.130 CML CML CML − 0.130 SHARED_EDID pin Other 5 V digital inputs 2.6 −150 −82 2.4 10 0.3 0.4 TBIT 0.15 TBIT + 112 TMDS Input Clock Range Input Clock Jitter Tolerance 25 0.5 Max 0.8 +60 +10 10 0.8 +60 +82 0.4 20 0.2 tPIXEL + 1.78 225 0.25 TBIT Unit nF MΩ V V V V V V V V V V µA µA pF V V µA µA V V µA pF pF ps ps ns MHz TBIT 1 The following pins are 5 V tolerant: HS_IN1, HS_IN2, VS_IN1, VS_IN2, DDCA_SCL, DDCA_SDA, DDCB_SCL, DDCB_SDA, DDCC_SCL, DDCC_SDA, DDCD_SCL, DDCD_SDA, RXA_5V, RXB_5V, RXC_5V, RXD_5V, SHARED_EDID, PWRDN, EP_MISO. Rev. D \| Page 4 of 20 5 Page ADV7604 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 A DGND RXD_2– RXD_1– RXD_0– RXD_C– DGND RXC_2– RXC_1– RXC_0– RXC_C– TVDD RXB_2– RXB_1– RXB_0– RXB_C– TVDD TVDD DGND A B RXD_5V RXD_2+ RXD_1+ RXD_0+ RXD_C+ TVDD RXC_2+ RXC_1+ RXC_0+ RXC_C+ TVDD RXB_2+ RXB_1+ RXB_0+ RXB_C+ TVDD RXA_2+ RXA_2– B C PWRDN TVDD TVDD CVDD DGND TVDD TVDD DGND DGND DGND TVDD TVDD DGND DGND DGND DGND RXA_1+ RXA_1– C D RXC_5V RXB_5V RXA_5V DDCD_ SDA DDCD_ SCL DDCC_ SDA DDCC_ SCL CVDD DGND RTERM CVDD DDCB_ DDCB_ DDCA_ DDCA_ SDA SCL SCL SDA TVDD RXA_0+ RXA_0– D E DE CEC NC NC DGND DGND RXA_C+ RXA_C– E F HS VS_ FIELD EP_MISO EP_MOSI DGND CVDD TVDD DGND F G P1 P0 EP_CS EP_SCK DGND DGND DGND DGND PVDD PVDD NC NC TEST1 TEST2 G H P3 P2 RAW_ VSYNC RAW_ SYNC J DGND DGND MCLK OUT SPDIF/ DSD0A/ DST K P4 P5 LRCLK/ DSD2B/ DST_FF SCLK/ DST_CLK L P6 I2S3/ I2S2/ P7 DSD2A/ DSD1B/ HBR3 HBR2 M P8 DGND DGND DGND DGND DGND DGND DGND AGND AGND DVDD DGND DGND DGND AGND AGND DVDD DVDD DGND DGND AGND AVDD DVDD DVDD DGND DGND AGND AVDD DVDD DVDD DGND DGND AGND AVDD XTALP AVDD REFN REFP H XTALN AVDD AGND AGND J AVDD AVDD AIN11 AIN12 K TRI8/VS_ TRI7/HS_ SYNC4 IN2 IN2 AIN10 L TRI5 TRI6 AGND AGND M N P9 DVDDIO DVDDIO DVDDIO TRI3 TRI4 AIN8 AIN9 N P P10 R P12 I2S0/ I2S1/ P11 DSD0B/ DSD1A/ HBR0 HBR1 AVDD AVDD SYNC3 AIN7 P SHARED_ Y_MUX_ P13 DGND DGND SCL DVDDIO INT1 CLAMPIN DVDDIO DGND FB_OUT EDID HS_IN1 AGND OUT TRI2 AGND AGND R T P14 P15 DGND DGND P25 DVDDIO SDA SYNC_ OUT/INT2 DVDDIO DGND RESET AVLINK VS_IN1 AGND TRI1 SYNC2 AIN5 AIN6 T U P16 P17 P19 P21 P23 DGND P26 DCLKIN P28 DGND P31 P33 P35 AGND SYNC1 AVDD AVDD AIN4 U V DGND P18 P20 P22 P24 DGND P27 1234567 Table 6. Pin Function Descriptions Pin No. Mnemonic Type A1 DGND Ground A2 RXD_2− HDMI input A3 RXD_1− HDMI input A4 RXD_0− HDMI input A5 RXD_C− HDMI input A6 DGND Ground A7 RXC_2− HDMI input A8 RXC_1− HDMI input A9 RXC_0− HDMI input A10 RXC_C− HDMI input A11 TVDD Power A12 RXB_2− HDMI input A13 RXB_1− HDMI input A14 RXB_0− HDMI input A15 RXB_C− HDMI input LLC P29 DGND P30 P32 8 9 10 11 12 Figure 5. Pin Configuration P34 AGND AIN1 AIN2 AIN3 AGND V 13 14 15 16 17 18 Description Ground. Digital Input Channel 2 Complement of Port D in the HDMI Interface. Digital Input Channel 1 Complement of Port D in the HDMI Interface. Digital Input Channel 0 Complement of Port D in the HDMI Interface. Digital Input Clock Complement of Port D in the HDMI Interface. Ground. Digital Input Channel 2 Complement of Port C in the HDMI Interface. Digital Input Channel 1 Complement of Port C in the HDMI Interface. Digital Input Channel 0 Complement of Port C in the HDMI Interface. Digital Input Clock Complement of Port C in the HDMI Interface. Terminator Supply Voltage (3.3 V ). Digital Input Channel 2 Complement of Port B in the HDMI Interface. Digital Input Channel 1 Complement of Port D in the HDMI Interface. Digital Input Channel 0 Complement of Port B in the HDMI Interface. Digital Input Clock Complement of Port B in the HDMI Interface. Rev. D \| Page 10 of 20 11 Page

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