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Número de pieza | PIC18F1220 | |
Descripción | (PIC18F1220 / PIC18F1320) Enhanced Flash Microcontrollers | |
Fabricantes | Microchip Technology | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de PIC18F1220 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! PIC18F1220/1320
Data Sheet
18/20/28-Pin High-Performance,
Enhanced Flash Microcontrollers
with 10-Bit A/D and nanoWatt Technology
© 2007 Microchip Technology Inc.
DS39605F
1 page PIC18F1220/1320
Table of Contents
1.0 Device Overview .......................................................................................................................................................................... 5
2.0 Oscillator Configurations ............................................................................................................................................................ 11
3.0 Power Managed Modes ............................................................................................................................................................. 19
4.0 Reset .......................................................................................................................................................................................... 33
5.0 Memory Organization ................................................................................................................................................................. 41
6.0 Flash Program Memory.............................................................................................................................................................. 57
7.0 Data EEPROM Memory ............................................................................................................................................................. 67
8.0 8 x 8 Hardware Multiplier............................................................................................................................................................ 71
9.0 Interrupts .................................................................................................................................................................................... 73
10.0 I/O Ports ..................................................................................................................................................................................... 87
11.0 Timer0 Module ........................................................................................................................................................................... 99
12.0 Timer1 Module ......................................................................................................................................................................... 103
13.0 Timer2 Module ......................................................................................................................................................................... 109
14.0 Timer3 Module ......................................................................................................................................................................... 111
15.0 Enhanced Capture/Compare/PWM (ECCP) Module................................................................................................................ 115
16.0 Enhanced Addressable Universal Synchronous Asynchronous Receiver Transmitter (EUSART) .......................................... 131
17.0 10-Bit Analog-to-Digital Converter (A/D) Module ..................................................................................................................... 155
18.0 Low-Voltage Detect .................................................................................................................................................................. 165
19.0 Special Features of the CPU.................................................................................................................................................... 171
20.0 Instruction Set Summary .......................................................................................................................................................... 191
21.0 Development Support............................................................................................................................................................... 233
22.0 Electrical Characteristics .......................................................................................................................................................... 237
23.0 DC and AC Characteristics Graphs and Tables....................................................................................................................... 267
24.0 Packaging Information.............................................................................................................................................................. 285
Appendix A: Revision History............................................................................................................................................................. 291
Appendix B: Device Differences ........................................................................................................................................................ 291
Appendix C: Conversion Considerations ........................................................................................................................................... 292
Appendix D: Migration from Baseline to Enhanced Devices.............................................................................................................. 292
Appendix E: Migration from Mid-Range to Enhanced Devices .......................................................................................................... 293
Appendix F: Migration from High-End to Enhanced Devices ............................................................................................................. 293
Index .................................................................................................................................................................................................. 295
The Microchip Web Site ..................................................................................................................................................................... 303
Customer Change Notification Service .............................................................................................................................................. 303
Customer Support .............................................................................................................................................................................. 303
Reader Response .............................................................................................................................................................................. 304
PIC18F1220/1320 Product Identification System .............................................................................................................................. 305
© 2007 Microchip Technology Inc.
DS39605F-page 3
5 Page PIC18F1220/1320
TABLE 1-2: PIC18F1220/1320 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
PDIP/
SOIC
SSOP
QFN
Pin
Type
Buffer
Type
Description
PORTB is a bidirectional I/O port. PORTB can be software
programmed for internal weak pull-ups on all inputs.
RB0/AN4/INT0
RB0
AN4
INT0
899
I/O TTL
Digital I/O.
I Analog
Analog input 4.
I ST
External interrupt 0.
RB1/AN5/TX/CK/INT1
RB1
AN5
TX
CK
INT1
9
10 10
I/O TTL
I Analog
O—
I/O ST
I ST
Digital I/O.
Analog input 5.
EUSART asynchronous transmit.
EUSART synchronous clock (see related RX/DT).
External interrupt 1.
RB2/P1B/INT2
RB2
P1B
INT2
17 19 23
I/O TTL
O—
I ST
Digital I/O.
Enhanced CCP1/PWM output.
External interrupt 2.
RB3/CCP1/P1A
RB3
CCP1
P1A
18 20 24
I/O TTL
I/O ST
O—
Digital I/O.
Capture 1 input/Compare 1 output/PWM 1 output.
Enhanced CCP1/PWM output.
RB4/AN6/RX/DT/KBI0 10 11 12
RB4
I/O TTL
Digital I/O.
AN6
I Analog
Analog input 6.
RX
I ST
EUSART asynchronous receive.
DT
I/O ST
EUSART synchronous data (see related TX/CK).
KBI0
I TTL
Interrupt-on-change pin.
RB5/PGM/KBI1
RB5
PGM
KBI1
11 12 13
I/O TTL
I/O ST
I TTL
Digital I/O.
Low-Voltage ICSP Programming enable pin.
Interrupt-on-change pin.
RB6/PGC/T1OSO/
T13CKI/P1C/KBI2
RB6
PGC
T1OSO
T13CKI
P1C
KBI2
12 13 15
I/O TTL
I/O ST
O—
I ST
O—
I TTL
Digital I/O.
In-Circuit Debugger and ICSP programming clock pin.
Timer1 oscillator output.
Timer1/Timer3 external clock output.
Enhanced CCP1/PWM output.
Interrupt-on-change pin.
RB7/PGD/T1OSI/
P1D/KBI3
RB7
PGD
T1OSI
P1D
KBI3
13 14 16
I/O TTL
I/O ST
I CMOS
O—
I TTL
Digital I/O.
In-Circuit Debugger and ICSP programming data pin.
Timer1 oscillator input.
Enhanced CCP1/PWM output.
Interrupt-on-change pin.
VSS
5 5, 6 3, 5 P
— Ground reference for logic and I/O pins.
VDD
14 15, 16 17, 19 P
— Positive supply for logic and I/O pins.
NC
— — 18 —
— No connect.
Legend:
TTL =
ST =
O=
OD =
TTL compatible input
Schmitt Trigger input with CMOS levels
Output
Open-drain (no P diode to VDD)
CMOS = CMOS compatible input or output
I = Input
P = Power
© 2007 Microchip Technology Inc.
DS39605F-page 9
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet PIC18F1220.PDF ] |
Número de pieza | Descripción | Fabricantes |
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