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NM29A080 Schematic ( PDF Datasheet ) - National Semiconductor

Teilenummer NM29A080
Beschreibung (NM29A040 / NM29A080) 4-Mbit/8-Mbit CMOS Serial FLASH E2PROM
Hersteller National Semiconductor
Logo National Semiconductor Logo 




Gesamt 14 Seiten
NM29A080 Datasheet, Funktion
February 1996
NM29A040 080
www.datasheet4u.4co-mMbit 8-Mbit CMOS Serial FLASH E2PROM
General Description
The NM29A040 080 are 4-Mbit and 8-Mbit Flash memories
designed with a MICROWIRETM serial interface All of the
features of the device are designed to provide the most cost
effective solution for applications requiring low bandwidth
file storage Examples of these applications include digital
answering machines and personal digital recorders (digital
audio) or FAX and digital scanners (digital imaging) The
Serial Flash requires only a single 5V power supply has a
small erase block size (4 kbytes) and a low EMI serial inter-
face
The NM29A040 080 have been designed to work seam-
lessly with National’s CompactRISCTM family (e g
NSAM266) of processors In this manner National is able to
provide the complete system solution to digital audio re-
cording (processor CODEC Flash memory software) or
digital imaging
Features
Y Single 5V g10% power supply
Y 4 kbyte erase block
Y Organized as 128 (256) Blocks per 4-Mbit (8-Mbit)
Device
128 pages per block
32 bytes per page (256 bits)
Y MICROWIRETM compatible interface
Y Low operating current (typical)
5 mA read current
15 mA write current
10 mA erase current
5 mA standby current
Y 100k write erase cycle endurance
Y Offered in PLCC and SOIC packages
Block Diagram
TL D 12475 – 1
TRI-STATE is a registered trademark of National Semiconductor Corporation
MICROWIRETM SpeechProTM CompactRISCTM and CompactSPEECHTM are trademarks of National Semiconductor Corporation
C1996 National Semiconductor Corporation TL D 12475
RRD-B30M36 Printed in U S A
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NM29A080 Datasheet, Funktion
Instruction Set
The NM29A040 080 have 12 instructions which are de-
scribed in Table II The command byte (Byte 1) has the
following format
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enabled or disabled mode Bit 0 distinguishes between a
4-Mbit device and an 8-Mbit device The remaining bits are
reserved for future use and may appear as any value (‘‘1’’ or
‘‘0’’)
FIGURE 7 Command Byte
TL D 12475–10
The MSB is always a ‘‘1’’ and is considered the start bit all
leading ‘‘0’s’’ are ignored The first ‘‘1’’ detected on the ris-
ing edge of SK indicates the initiation of a command The
next 4 bits are the instruction opcode The final 3 bits are
reserved and must always be ‘‘0’’ Data input of a command
other than those listed in Table II is prohibited Data may be
corrupted if unspecified commands are used
TABLE II Instruction Set
Command Byte 1
Get-Status
80H
Set-Address
88H
Increment
90H
Read
98H
Write
A0H
Erase
A8H
Data-Shift-In
B0H
Data-Shift-Out B8H
Read Last Block D0H
Write Enable
E0H
Write Disable E8H
Write Last Block F0H
Byte 2
Byte 3
Block Address Page Address
55H
Block Address
Bits to Shift-In
Bits to Shift-Out
55H
55H
GET-STATUS
The Get-Status command allows the user to determine the
status of the NM29A040 080 It may be issued whether the
device is busy or not The output is a status byte which
indicates the internal state of the Serial Flash The output
byte is defined as
TL D 12475–11
FIGURE 8 Get-Status Byte
Bit 7 of the status byte tells whether the device is busy
performing an operation (write erase etc ) or is ready for a
new command Bit 6 tells if a previous write or erase cycle
completed successfully Bit 5 tells if the device is in a write
TL D 12475 – 12
FIGURE 9 Get-Status Sequence
SET-ADDRESS
The Set-Address command defines which page and block
of the memory is affected by an operation The Set-Address
command is followed by two bytes the first indicating the
block number and the second indicating the page number
The block number chooses one of the 127 254 blocks while
the page number chooses one of the 128 pages within the
given block The Set-Address command is usually followed
by a Read Write or Data-Shift-In command Between the
page address byte and the next command there is a delay
of tSADD The address that is selected remains the active
address until a new Set-Address or Increment command is
given
INCREMENT
The Increment command automatically increments the se-
lected page address When the Increment command is giv-
en after the last page in a block has been read the address
will roll over to the first page in the following block When
the last page in the last addressable block is read out fol-
lowed by an Increment command the new address is inde-
terminate
TL D 12475 – 13
FIGURE 10 Increment Sequence
READ
The Read command transfers data from the selected page
of the memory array into the data register To read the data
out through DO the Read command is followed by the two
byte Data-Shift-Out command There is a delay of tR be-
tween the Read command and the Data-Shift-Out command
as the data is transferred from the array to the on-chip buff-
er During tR the status byte will indicate that the part is
busy
WRITE
The Write command programs data from the 32-byte shift
register into a page in the memory array for the currently
selected address A security code 55H follows the Write
command to ensure against accidental Writes Get-Status
may be used to ensure that the operation was successful
The Write command will be ignored if Write-Enable has not
been set
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NM29A080 pdf, datenblatt
Physical Dimensions inches (millimeters)
www.datasheet4u.com
Molded Small Outline Package
Order Number NM29A040M NM29A080M
NS Package Number MA28A
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