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PDF HT46C48A Data sheet ( Hoja de datos )

Número de pieza HT46C48A
Descripción Cost-Effective A/D Type 8-Bit MCU
Fabricantes Holtek Semiconductor 
Logotipo Holtek Semiconductor Logotipo



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HT46R46/C46/R47/C47/R48A/C48A/R49
Cost-Effective A/D Type 8-Bit MCU
Technical Document
www.datasheet4u·.coTmools Information
· FAQs
· Application Note
- HA0003E Communicating between the HT48 & HT46 Series MCUs and the HT93LC46 EEPROM
- HA0049E Read and Write Control of the HT1380
- HA0051E Li Battery Charger Demo Board - Using the HT46R47
- HA0052E Microcontroller Application - Battery Charger
- HA0075E MCU Reset and Oscillator Circuits Application Note
- HA0083E Li Battery Charger Demo Board - Using the HT46R46
Features
· Operating voltage:
fSYS=4MHz: 2.2V~5.5V
fSYS=8MHz: 3.3V~5.5V
· 13 to 23 bidirectional I/O lines
· External interrupt input shared with an I/O line
· 8-bit programmable Timer/Event Counter with over-
flow interrupt and 7-stage prescaler
· On-chip crystal and RC oscillator
· Watchdog Timer function
· PFD for audio frequency generation
· Power down and wake-up functions to reduce power
consumption
· Up to 0.5ms instruction cycle with 8MHz system clock
at VDD=5V
· 4 or 6-level subroutine nesting
· 4 channels 8 or 9-bit resolution A/D converter
· 1 or 2 channel 8-bit PWM output shared with I/O lines
· Bit manipulation instruction
· Table read instructions
· 63 powerful instructions
· All instructions executed in one or two machine
cycles
· Low voltage reset function
· Range of packaging types
General Description
The Cost-Effective A/D Type MCU Devices are a series
of 8-bit high performance RISC architecture
microcontrollers, designed especially for applications
that interface directly to analog signals, such as those
from sensors. All devices include an integrated
multi-channel Analog to Digital Converter in addition to
one or two Pulse Width Modulation outputs. The usual
Holtek MCU features such as power down and wake-up
functions, oscillator options, programmable frequency
divider, etc. combine to ensure user applications require
a minimum of external components.
The benefits of integrated A/D and PWM functions, in
addition to low power consumption, high performance,
I/O flexibility and low-cost, provide these devices with
the versatility to suit a wide range of application possibil-
ities such as sensor signal processing, motor driving, in-
dustrial control, consumer products, subsystem
controllers, etc. Many features are common to all de-
vices, however, they differ in areas such as I/O pin
count, Program Memory capacity, A/D resolution, stack
capacity and package types.
Rev. 1.30
1 June 5, 2008

1 page




HT46C48A pdf
HT46R46/C46/R47/C47/R48A/C48A/R49
HT46R49
Pin Name
I/O
Configuration
Option
Description
PA0~PA2
PA3/PFD
www.datasheet4u.cPoAm4/TMR
PA5/INT
PA6~PA7
Bidirectional 8-bit input/output port. Each individual pin on this port can be config-
Pull-high ured as a wake-up input by a configuration option. Software instructions deter-
I/O Wake-up mine if the pin is a CMOS output or Schmitt Trigger input. Configuration options
PA3 or PFD determine which pins on the port have pull-high resistors. Pins PA3, PA4 and PA5
are pin-shared with PFD, TMR and INT, respectively.
PB0/AN0
PB1/AN1
PB2/AN2
PB3/AN3
PB4~PB7
I/O
Pull-high
Bidirectional 8-bit input/output port. Software instructions determine if the pin is a
CMOS output or Schmitt Trigger input. Configuration options determine which
pins on the port have pull-high resistors. PB is pin-shared with the A/D input pins.
The A/D inputs are selected via software instructions. Once selected as an A/D in-
put, the I/O function and pull-high resistor options are disabled automatically.
PC0~PC4 I/O
Pull-high
Bidirectional 5-bit input/output port. Software instructions determine if the pin is a
CMOS output or Schmitt Trigger input. Configuration options determine which
pins on the port have pull-high resistors.
PD0/PWM0
PD1/PWM1
I/O
Pull-high
I/O or PWM
Bidirectional 2-bit input/output port. Software instructions determine if the pin is a
CMOS output or Schmitt Trigger input. Configuration option determines if this pin
has a pull-high resistor. The PWM output are pin-shared with pins PD0 and PD1
selected via a configuration option.
OSC1
OSC2
OSC1, OSC2 are connected to an external RC network or external crystal, deter-
I
O
Crystal or RC
mined by configuration option, for the internal system clock. If the RC system
clock option is selected, pin OSC2 can be used to measure the system clock at
1/4 frequency.
RES
I ¾ Schmitt Trigger reset input. Active low.
VDD
¾ ¾ Positive power supply
VSS
¾ ¾ Negative power supply, ground
Note:
1. Each pin on PA can be programmed through a configuration option to have a wake-up function.
2. Individual pins can be selected to have a pull-high resistor.
3. Pins PC2~PC4 and pin PD1/PWM1 exist but are not bonded out on the 24-pin package.
4. Unbonded pins should be setup as outputs or as inputs with pull-high resistors to conserve power.
Absolute Maximum Ratings
Supply Voltage ...........................VSS-0.3V to VSS+6.0V
Input Voltage..............................VSS-0.3V to VDD+0.3V
IOL Total ..............................................................150mA
Total Power Dissipation .....................................500mW
Storage Temperature ............................-50°C to 125°C
Operating Temperature...........................-40°C to 85°C
IOH Total............................................................-100mA
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed
in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability.
Rev. 1.30
5 June 5, 2008

5 Page





HT46C48A arduino
www.datasheet4u.com
HT46R46/C46/R47/C47/R48A/C48A/R49
H T46R 46
H T46R 47
H T46R 48A
H T46R 49
0 0 0 H In itia lis a tio n
V e c to r
In itia lis a tio n
V e c to r
In itia lis a tio n
V e c to r
0 0 4 H E x te rn a l
In te rru p t V e c to r
E x te rn a l
In te rru p t V e c to r
E x te rn a l
In te rru p t V e c to r
0 0 8 H T im e r /E v e n t C o u n te r T im e r /E v e n t C o u n te r T im e r /E v e n t C o u n te r
In te rru p t V e c to r
In te rru p t V e c to r
In te rru p t V e c to r
0 0 C H A /D C o n v e rte r
In te rru p t V e c to r
A /D C o n v e rte r
In te rru p t V e c to r
A /D C o n v e rte r
In te rru p t V e c to r
010H
014H
300H
3FFH
400H
7FFH
800H
FFFH
1 4 b its
1 4 b its
1 5 b its
Program Memory Structure
N o t Im p le m e n te d
Look-up Table
Any location within the Program Memory can be defined
as a look-up table where programmers can store fixed
data. To use the look-up table, the table pointer must
first be setup by placing the lower order address of the
look up data to be retrieved in the table pointer register,
TBLP. This register defines the lower 8-bit address of
the look-up table.
After setting up the table pointer, the table data can be
retrieved from the current Program Memory page or last
Program Memory page using the ²TABRDC[m]² or
²TABRDL [m]² instructions, respectively. When these in-
structions are executed, the lower order table byte from
the Program Memory will be transferred to the user de-
fined Data Memory register [m] as specified in the in-
struction. The higher order table data byte from the
Program Memory will be transferred to the TBLH special
register. Any unused bits in this transferred higher order
byte will be read as ²0².
The following diagram illustrates the addressing/data
flow of the look-up table:
P ro g ra m C o u n te r
H ig h B y te
TB LP
P ro g ra m
M e m o ry
Table Program Example
The following example shows how the table pointer and
table data is defined and retrieved from the HT46R47
microcontroller. This example uses raw table data lo-
cated in the last page which is stored there using the
ORG statement. The value at this ORG statement is
²700H² which refers to the start address of the last page
within the 2K Program Memory of the HT46R47
microcontroller. The table pointer is setup here to have
an initial value of ²06H². This will ensure that the first
data read from the data table will be at the Program
Memory address ²706H² or 6 locations after the start of
the last page. Note that the value for the table pointer is
referenced to the first address of the present page if the
²TABRDC [m]² instruction is being used. The high byte
of the table data which in this case is equal to zero will
be transferred to the TBLH register automatically when
the ²TABRDL [m]² instruction is executed.
TB LH
T a b le C o n te n ts H ig h B y te
S p e c ifie d b y [m ]
T a b le C o n te n ts L o w B y te
Rev. 1.30
11
June 5, 2008

11 Page







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