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PDF STR-X6700 Data sheet ( Hoja de datos )
| Número de pieza | STR-X6700 | |
| Descripción | STR-X6700 Series | |
| Fabricantes | Sanken | |
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Product Information
STR-X6700 Series Off-Line
Quasi-Resonant Switching Regulators
Introduction
The STR-X6700 series integrates a quasi-resonant control
IC and a MOSFET with avalanche guarantee. In normal
operation, the device provides high efficiency and low EMI
noise with bottom-skip quasi-resonant operation during
light output loads. Low power consumption is also achieved
by Auto-standby mode (not available in the STR-X6729,
STR-X6759N, or STR-X6768N) or manual standby mode
(external trigger).
The device is supplied in a seven-pin fully-molded TO-3P-
style package, which is suitable for downsizing and stan-
dardizing of an SMPS by reducing external component
count and simplifying circuit design.
Features and benefits include the following:
▪ Auto standby mode (burst oscillation) or manual standby
mode (UVLO intermittent oscillation) in the standby
mode.
▪ In addition to the standard quasi-resonant operation, a
bottom-skip mode is available for increased efficiency
from light to medium load.
▪ Soft-start operation at start-up.
▪ Reduced switching noise (compared to conventional
PWM hard-switching solution) with a step-drive
function.
▪ Built-in avalanche-energy-guaranteed power MOSFET
(to simplify surge-absorption circuit; no VDSS derating is
required).
▪ Overcurrent protection (OCP), overvoltage protection
(OVP), overload protection (OLP), and maximum
On-time control circuits are incorporated; OVP and OLP
go into a latched mode.
The product lineup for the STR-X6700 series provides the
options shown in table 1.
Contents
Introduction
Pin functional descriptions
Operation description
Transformer parameters
General considerations
Design considerations
Package dimensions, TO-3P
Worldwide Contacts
1
2
6
10
11
13
14
19
LF1901
LF1902
LF1905
Figure 1. STR-X6700 series packages are fully molded TO-3P
package types: LF1901 (STR-X6737 and STR-X6769), LF1902
(STR-X6729 and STR-X6768N), and LF1905 (STR-X6757 and
STR-X6759N).
Table 1. Product Line-up
Type #
STR-X6729b
MOSFET
VDSS
(V)
450
RDS(on)
(Max)
(Ω)
0.189
VAC
Input
(V)
120
POUTa
(W)
460
STR-X6737 500 0.36 120
280
STR-X6757
STR-X6759Nb
650
0.62
0.385
Wide
230
Wide
230
165
320
250
460
STR-X6768Nb
STR-X6769
800
Wide
1.00
230
Wide
0.66
230
150
220
210
310
aThe listed output power represents thermal ratings, and the peak
output power, POUT , is obtained by 120% to 140% of the thermal
rating value. In case of low output voltage and narrow on-duty
cycle, the POUT (W) becomes lower than the above.
bAuto-standby mode not included.
All performance characteristics given are typical values for
circuit or system baseline design only and are at the nominal
operating voltage and an ambient temperature of 25°C, un-
less otherwise stated.
28103.3013
1 page  
In the overload mode, where drain current is controlled by OCP
operation, the secondary-side output voltage drops. Accordingly,
the error-amplifier and photocoupler on the secondary side are
cut off. The STR-X6700 series regards the signal absence with
continuous OCP operation as an overload status, and the SS/OLP
pin voltage starts rising by ISSOLP(OLP) as shown in figure 10 and
in the following table:
OLP timing (0 to 4.9 V, charging current: 11 μA)
CSS (μF) 0.47
1.0
2.2
3.3
4.7
Time (ms) 209 445 980 1470 2094
NOTE: A large CSS value also results in a longer soft-start time.
After the SS/OLP pin voltage keeps rising to the OLP-Operation
Threshold Voltage (VSSOLP(OLP) = 4.9 V), the oscillation stops,
and the IC goes into a latched mode.
The time from OLP activation to a latched mode should be
obtained from the following formula, assuming ISSOLP(OLP) is
from a constant-current circuit:
t = CSS × ∆V
ISSOLP(OLP)
(2)
where ∆V is the capacitor charging voltage of approximately 4.9 V.
However, the ISSOLP(OLP) is dependent on the SS/OLP pin voltage,
and ISSOLP(OLP) drops as the SS/OLP pin voltage rises. The actual
SS/OLP
5
V
CSS
current value therefore does not exactly match the value calcu-
lated in the equation above, and the actual load conditions should
be carefully considered. Also, make sure that OCP operation at
power supply start-up does NOT place the IC in a latched mode.
Note: During this period, if VCC goes below the UVLO thresh-
old voltage, the IC does not go into a latch mode, but goes into
intermittent operation. Where the CSS voltage rises to 4.9 V and
VCC does not go below the UVLO threshold voltage, the IC goes
into a latched mode.
Operation at power supply turn off At power supply turn
off, voltage on capacitor CSS, which is externally connected to
the SS/OLP pin, is discharged by way of an internal RESET cir-
cuit as shown in figure 11. The RESET circuit does not operate in
normal operation while the internal regulator circuit operates.
Deactivating the OLP circuit To deactivate the OLP circuit
while soft-start is active, connect either a 47 kΩ resistor or a
Zener diode to the SS/OLP pin (figure 12). By doing this, OLP
operation is deactivated at start-up or during an overload status.
FB (Pin 6)
The FB pin is used in either a normal mode (constant-voltage-
control circuit operation) or in a standby mode. Refer to Standby
Operation section for controlling in the standby mode.
Constant voltage control circuit The STR-X6700 series
adopts the current-mode control circuit, which ensures stability
with a heavy load. The peak value of the MOSFET drain current
(at on-time) is changed by comparing the FB pin voltage with the
internal VOCPM. Off-time becomes quasi-resonant operation syn-
chronized to the reset signal from a transformer. Where no reset
signal is input from the transformer, it becomes fixed oscillation
frequency (approximately 22 kHz) set by the internal oscillator
Figure 11. Reset circuit at power turn off
SS/OLP
5
SS/OLP
5
47 kΩ
IDS
GND
VOCPM
VOCPD(LIM)
GND
Overload
VFB
Normal Load
Light Load
Figure 12. OLP deactivation circuit alternative configurations
Figure 13. Constant-voltage control at fixed oscillation frequency (quasi-
resonant signal not available)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
28103.3013
5 Page 
In addition, in the design of the transformer, using 130% of the
estimated peak switching current is recommended to ensure that
the transformer is not saturated, based on the plot of N × I-limit
(AT) versus AL-value (nH / N2).
Instead of performing the calculations above, software that pro-
vides a complete flyback transformer design tool is available.
CRT TV application concerns:
• Rather than winding with a single thick wire, a thin and
bifilar or trifilar winding across the entire width of bobbin is
recommended.
• For windings where NP and +B are a large number of turns,
divisional sandwich winding is recommended.
• For an output where a tight regulation is required, winding
with good coupling with S1 (+B) is recommended.
• For the +B winding, better coupling by use of litz wire is
required. In case the litz wire does not fit into a the bobbin
winding width, reduce the wire size, and use 2 to 3 of them in
strands.
• For improved thermal design:
▫ Leakage flux of wires close to the core center becomes large.
Eddy current can be reduced by the use of litz wire.
▫ In case the entire winding does not fit into the available
winding thickness, reduce the size of wires from outer side.
▫ Wire diameter is determined based on actual current and
should be less than 4 A / mm2.
Single and/or low-voltage output concerns:
• Wind so that wires are parallel and with good coupling.
• Sandwich winding is recommended.
General considerations
Universal AC input correction in OCP
With a universal AC input application, as described in the
Overload Protection (OLP) section, the load conditions for OCP
activation vary according to input voltage level, 110 V or 230 V.
Figure 23 illustrates a solution.
In the loop surrounded by the dashed line, the negative voltage of
the bias winding, which is in proportion to the input voltage level
when the MOSFET switches on, works for the input correction
during OLP.
The Zener diode is set to be on with a 230 VAC input, but not to
be activated with a 110 VAC input. When the bias winding output
voltage is 18 V, the resistor, Zener, and diode within the dashed
line are recommended.
Input
Smoothing
Capacitor
Start-up
Resistor
Snubber Circuit
P
P
CVoRltage
Resonant
Capacitor
D VCC
STR-X6700
S
GND
OCP SS/
/BD OLP FB
Bias
D
200 V
Fast
Recovery
Diode
Current-
Sense
Resistor
OCP
Sense
Filter
Bottom-Detection
Delay Circuit
10 to 22 kΩ
16 V
Loop for OCP Matching to Input Voltage
Figure 23. Reference circuit for general application considerations
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
11
28103.3013
11 Page | ||
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| PDF Descargar | [ Datasheet STR-X6700.PDF ] | |
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